Searched refs:VecRegClass (Results 1 - 16 of 16) sorted by relevance
| /gem5/src/cpu/o3/ |
| H A D | free_list.hh | 278 case VecRegClass:
311 case VecRegClass:
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| H A D | rename_map.cc | 165 auto range = regFile->getRegIds(VecRegClass);
216 PhysRegId pregId(VecRegClass, i, 0);
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| H A D | rename_map.hh | 236 case VecRegClass:
277 case VecRegClass:
321 case VecRegClass:
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| H A D | regfile.cc | 102 vecRegIds.emplace_back(VecRegClass, phys_reg, flat_reg_idx++);
207 case VecRegClass:
227 case VecRegClass:
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| H A D | cpu.hh | 438 RegId(VecRegClass, reg_idx));
449 RegId(VecRegClass, reg_idx));
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| H A D | dyn_inst.hh | 226 case VecRegClass:
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| H A D | cpu.cc | 265 RegId rid = RegId(VecRegClass, ridx);
1342 RegId(VecRegClass, reg_idx));
1352 RegId(VecRegClass, reg_idx));
1425 RegId(VecRegClass, reg_idx));
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| H A D | rename_impl.hh | 1086 case VecRegClass:
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| /gem5/src/cpu/ |
| H A D | reg_class.hh | 60 VecRegClass, enumerator in enum:RegClass
155 bool isVecReg() const { return regClass == VecRegClass; }
190 case VecRegClass:
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| H A D | thread_context.cc | 83 RegId rid(VecRegClass, i);
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| /gem5/src/arch/arm/ |
| H A D | remote_gdb.cc | 214 auto v = (context->readVecReg(RegId(VecRegClass, i))).as<VecElem>();
243 RegId(VecRegClass, i))).as<VecElem>();
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| H A D | nativetrace.cc | 129 auto vec(tc->readVecReg(RegId(VecRegClass,i))
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| H A D | isa.hh | 456 case VecRegClass:
457 return RegId(VecRegClass, flattenVecIndex(regId.index()));
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| /gem5/src/cpu/minor/ |
| H A D | dyn_inst.cc | 160 case VecRegClass:
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| H A D | scoreboard.cc | 70 case VecRegClass:
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| /gem5/src/cpu/checker/ |
| H A D | cpu_impl.hh | 614 case VecRegClass:
649 case VecRegClass:
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