Searched refs:NUM_MISCREGS (Results 1 - 14 of 14) sorted by relevance

/gem5/src/arch/power/
H A Dmiscregs.hh40 NUM_MISCREGS = 0 enumerator in enum:PowerISA::MiscRegIndex
43 const char * const miscRegName[NUM_MISCREGS] = {
H A Dregisters.hh81 const int NumMiscRegs = NUM_MISCREGS;
/gem5/src/arch/alpha/
H A Dregisters.hh71 NUM_MISCREGS enumerator in enum:AlphaISA::MiscRegIndex
100 const int NumMiscRegs = NUM_MISCREGS;
/gem5/src/arch/x86/
H A Dregisters.hh57 const int NumMiscRegs = NUM_MISCREGS;
H A Disa.hh54 RegVal regVal[NUM_MISCREGS];
H A Dutility.cc219 for (int i = 0; i < NUM_MISCREGS; ++i) {
/gem5/src/arch/arm/kvm/
H A Darm_cpu.cc242 { 0, NUM_MISCREGS }
384 return NUM_MISCREGS;
400 return NUM_MISCREGS;
403 return NUM_MISCREGS;
406 return NUM_MISCREGS;
414 return NUM_MISCREGS;
427 return NUM_MISCREGS;
430 return NUM_MISCREGS;
476 ri->idx != NUM_MISCREGS; ++ri) {
533 if (idx != NUM_MISCREGS
[all...]
/gem5/src/arch/arm/
H A Dregisters.hh100 const int NumMiscRegs = NUM_MISCREGS;
H A Dmiscregs.hh937 NUM_MISCREGS enumerator in enum:ArmISA::MiscRegIndex
983 extern std::bitset<NUM_MISCREG_INFOS> miscRegInfo[NUM_MISCREGS];
1868 static_assert(sizeof(miscRegName) / sizeof(*miscRegName) == NUM_MISCREGS, member in namespace:ArmISA
1869 "The miscRegName array and NUM_MISCREGS are inconsistent.");
H A Dmiscregs.cc1093 int unflattenResultMiscReg[NUM_MISCREGS];
1099 for (int i = 0 ; i < NUM_MISCREGS; i++){
2844 bitset<NUM_MISCREG_INFOS> miscRegInfo[NUM_MISCREGS]; // initialized below
H A Disa.cc119 std::vector<struct ISA::MiscRegLUTEntry> ISA::lookUpMiscReg(NUM_MISCREGS);
/gem5/src/arch/x86/regs/
H A Dmisc.hh400 NUM_MISCREGS enumerator in enum:X86ISA::MiscRegIndex
406 return (index >= MISCREG_CR0 && index < NUM_MISCREGS &&
/gem5/src/arch/riscv/
H A Dregisters.hh262 NUM_MISCREGS enumerator in enum:RiscvISA::MiscRegIndex
264 const int NumMiscRegs = NUM_MISCREGS;
/gem5/src/arch/arm/insts/
H A Dstatic_inst.cc369 assert(reg_idx < NUM_MISCREGS);

Completed in 52 milliseconds