/gem5/src/cpu/testers/rubytest/ |
H A D | Check.cc | 111 m_tester_ptr->masterId(), curTick(), m_pc); 149 m_tester_ptr->masterId(), curTick(), m_pc); 182 writeAddr, 1, flags, m_tester_ptr->masterId(), curTick(), m_pc); 246 m_tester_ptr->masterId(), curTick(), m_pc);
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H A D | RubyTester.hh | 120 MasterID masterId() { return _masterId; } function in class:RubyTester
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/gem5/src/gpu-compute/ |
H A D | dispatcher.hh | 60 MasterID masterId() { return _masterId; } function in class:GpuDispatcher
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H A D | fetch_unit.cc | 150 computeUnit->masterId(), 0, 0, nullptr);
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H A D | shader.cc | 344 cuList[0]->masterId(), 0, 0, nullptr);
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/gem5/src/cpu/checker/ |
H A D | cpu.cc | 65 masterId = systemPtr->getMasterId(this); 163 flags, masterId, thread->pcState().instAddr(), 169 flags, masterId, thread->pcState().instAddr(),
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H A D | cpu_impl.hh | 249 sizeof(MachInst), 0, masterId, fetch_PC, 253 Request::INST_FETCH, masterId,
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/gem5/src/dev/arm/ |
H A D | smmu_v3.hh | 93 const MasterID masterId; member in class:SMMUv3
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/gem5/src/systemc/tlm_bridge/ |
H A D | tlm_to_gem5.hh | 177 const MasterID masterId; member in class:sc_gem5::TlmToGem5Bridge
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/gem5/src/cpu/testers/memtest/ |
H A D | memtest.cc | 98 masterId(p->system->getMasterId(this)), 249 RequestPtr req = std::make_shared<Request>(paddr, 1, flags, masterId);
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/gem5/src/mem/cache/ |
H A D | noncoherent_cache.cc | 280 assert(tgt_pkt->req->masterId() < system->maxMasters()); 281 missLatency[tgt_pkt->cmdToIndex()][tgt_pkt->req->masterId()] +=
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H A D | base.hh | 1196 assert(pkt->req->masterId() < system->maxMasters()); 1197 misses[pkt->cmdToIndex()][pkt->req->masterId()]++; 1207 assert(pkt->req->masterId() < system->maxMasters()); 1208 hits[pkt->cmdToIndex()][pkt->req->masterId()]++;
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H A D | cache.cc | 337 mshr_uncacheable[pkt->cmdToIndex()][pkt->req->masterId()]++; 384 pkt->req->masterId()); 778 assert(tgt_pkt->req->masterId() < system->maxMasters()); 779 missLatency[tgt_pkt->cmdToIndex()][tgt_pkt->req->masterId()] +=
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H A D | base.cc | 275 assert(pkt->req->masterId() < system->maxMasters()); 276 mshr_hits[pkt->cmdToIndex()][pkt->req->masterId()]++; 299 assert(pkt->req->masterId() < system->maxMasters()); 300 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++; 448 assert(pkt->req->masterId() < system->maxMasters()); 449 mshr_uncacheable_lat[stats_cmd_idx][pkt->req->masterId()] += 452 assert(pkt->req->masterId() < system->maxMasters()); 453 mshr_miss_latency[stats_cmd_idx][pkt->req->masterId()] += 781 assert(pkt->req->masterId() < system->maxMasters()); 782 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()] [all...] |
/gem5/src/mem/cache/prefetch/ |
H A D | queued.cc | 294 masterId, tagPrefetch, pf_time); 345 addr, blkSize, pkt->req->getFlags(), masterId, pfi.getPC(), 434 dpp.createPkt(target_paddr, blkSize, masterId, tagPrefetch, pf_time);
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/gem5/src/dev/ |
H A D | dma_device.cc | 60 device(dev), sys(s), masterId(s->getMasterId(dev)), 174 gen.addr(), gen.size(), flag, masterId);
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H A D | dma_device.hh | 121 const MasterID masterId; member in class:DmaPort
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/gem5/src/mem/ |
H A D | dram_ctrl.hh | 707 inline MasterID masterId() const { return _masterId; } function in class:DRAMCtrl::DRAMPacket 738 _masterId(pkt->masterId()),
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H A D | dram_ctrl.cc | 434 masterReadAccesses[pkt->masterId()]++; 488 logRequest(MemCtrl::READ, pkt->masterId(), pkt->qosValue(), 532 masterWriteAccesses[pkt->masterId()]++; 553 logRequest(MemCtrl::WRITE, pkt->masterId(), pkt->qosValue(), 1313 masterReadTotalLat[dram_pkt->masterId()] += 1318 masterReadBytes[dram_pkt->masterId()] += dram_pkt->size; 1325 masterWriteBytes[dram_pkt->masterId()] += dram_pkt->size; 1326 masterWriteTotalLat[dram_pkt->masterId()] += 1492 logResponse(MemCtrl::READ, (*to_read)->masterId(), 1592 logResponse(MemCtrl::WRITE, dram_pkt->masterId(), [all...] |
H A D | packet.hh | 714 inline MasterID masterId() const { return req->masterId(); } function
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/gem5/src/mem/qos/ |
H A D | mem_ctrl.cc | 232 return schedule(pkt->req->masterId(), pkt->getSize());
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/gem5/src/mem/cache/tags/ |
H A D | base.cc | 109 MasterID master_id = pkt->req->masterId();
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/gem5/src/arch/hsail/insts/ |
H A D | mem.hh | 466 gpuDynInst->computeUnit()->masterId(), 593 gpuDynInst->computeUnit()->masterId(), 1019 gpuDynInst->computeUnit()->masterId(), 1071 gpuDynInst->computeUnit()->masterId(), 1493 gpuDynInst->computeUnit()->masterId(), 1626 gpuDynInst->computeUnit()->masterId(), 1680 gpuDynInst->computeUnit()->masterId(),
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/gem5/src/arch/x86/ |
H A D | pagetable_walker.cc | 524 nextRead, oldRead->getSize(), flags, walker->masterId); 593 topAddr, dataSize, flags, walker->masterId);
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/gem5/util/tlm/src/ |
H A D | sc_master_port.cc | 52 owner.masterId);
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