Searched refs:Tick (Results 176 - 200 of 407) sorted by relevance
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/gem5/src/dev/arm/ |
H A D | vio_mmio.hh | 56 Tick read(PacketPtr pkt) override; 57 Tick write(PacketPtr pkt) override;
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H A D | vgic.hh | 120 Tick pioDelay; 202 Tick read(PacketPtr pkt) override; 203 Tick write(PacketPtr pkt) override; 209 Tick readVCpu(PacketPtr pkt); 210 Tick readCtrl(PacketPtr pkt); 212 Tick writeVCpu(PacketPtr pkt); 213 Tick writeCtrl(PacketPtr pkt); 217 void postVInt(uint32_t cpu, Tick when);
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H A D | smmu_v3_proc.hh | 73 Tick delay; 125 void scheduleWakeup(Tick when);
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H A D | a9scu.cc | 53 Tick 90 Tick
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H A D | smmu_v3_slaveifc.hh | 99 Tick recvAtomic(PacketPtr pkt); 103 Tick atsSlaveRecvAtomic(PacketPtr pkt);
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H A D | energy_ctrl.cc | 63 Tick 85 Tick period; 149 Tick 227 Tick next_event = updateAckEvent.scheduled() ? updateAckEvent.when() : 0; 238 Tick next_event = 0;
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H A D | rtc_pl031.cc | 60 Tick 122 Tick 172 Tick ticks_until = SimClock::Int::s * seconds_until; 211 Tick event_time; 234 Tick event_time;
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H A D | timer_sp804.cc | 57 Sp804::Timer::Timer(std::string __name, Sp804 *_parent, int int_num, Tick _clock) 65 Tick 94 Tick time; 120 Tick 182 Tick time = clock * power(16, control.timerPrescale); 238 Tick event_time; 261 Tick event_time;
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/gem5/src/dev/mips/ |
H A D | malta_cchip.cc | 66 Tick 73 Tick
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/gem5/src/dev/x86/ |
H A D | speaker.cc | 40 Tick 56 Tick
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H A D | i8237.cc | 36 Tick 71 Tick
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H A D | i82094aa.hh | 100 Tick read(PacketPtr pkt) override; 101 Tick write(PacketPtr pkt) override;
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H A D | i8254.cc | 51 Tick 67 Tick
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/gem5/util/systemc/gem5_within_systemc/ |
H A D | sc_logger.cc | 82 logger->logMessage((Tick)-1, "gem5", line.str()); 135 Logger::logMessage(Tick when, const std::string &name,
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/gem5/src/dev/net/ |
H A D | etherlink.cc | 110 double rate, Tick delay, Tick delay_var, EtherDump *d) 190 Tick delay = (Tick)ceil(((double)pkt->simLength * ticksPerByte) + 1.0); 192 delay += random_mt.random<Tick>(0, delayVar); 212 Tick event_time = doneEvent.when(); 240 Tick event_time; 248 Tick tick;
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/gem5/src/mem/cache/prefetch/ |
H A D | bop.hh | 85 Tick processTick; 87 DelayQueueEntry(Addr x, Tick t) : baseAddr(x), processTick(t)
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/gem5/src/cpu/testers/memtest/ |
H A D | memtest.hh | 116 Tick recvAtomicSnoop(PacketPtr pkt) { return 0; } 164 Tick nextProgressMessage; // access # for next progress report
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/gem5/src/cpu/testers/garnet_synthetic_traffic/ |
H A D | GarnetSyntheticTraffic.hh | 118 Tick noResponseCycles; 121 Tick simCycles;
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/gem5/src/mem/cache/ |
H A D | write_queue_entry.hh | 84 void add(PacketPtr pkt, Tick readyTime, Counter order); 128 Tick when_ready, Counter _order);
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/gem5/src/mem/ |
H A D | noncoherent_xbar.cc | 130 Tick old_header_delay = pkt->headerDelay; 133 Tick xbar_delay = (frontendLatency + forwardLatency) * clockPeriod(); 139 Tick packetFinishTime = clockEdge(Cycles(1)) + pkt->payloadDelay; 209 Tick xbar_delay = responseLatency * clockPeriod(); 215 Tick packetFinishTime = clockEdge(Cycles(1)) + pkt->payloadDelay; 219 Tick latency = pkt->headerDelay; 245 Tick 266 Tick response_latency = backdoor ?
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H A D | coherent_xbar.hh | 123 Tick 129 Tick 189 Tick 334 Tick recvAtomicBackdoor(PacketPtr pkt, PortID slave_port_id, 336 Tick recvAtomicSnoop(PacketPtr pkt, PortID master_port_id); 348 std::pair<MemCmd, Tick> 367 std::pair<MemCmd, Tick> forwardAtomic(PacketPtr pkt,
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/gem5/src/mem/ruby/system/ |
H A D | CacheRecorder.hh | 57 Tick m_time; 77 RubyRequestType type, Tick time, DataBlock& data);
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/gem5/src/sim/ |
H A D | insttracer.hh | 61 Tick when; 150 InstRecord(Tick _when, ThreadContext *_thread, 171 void setWhen(Tick new_when) { when = new_when; } 227 Tick getWhen() const { return when; } 259 getInstRecord(Tick when, ThreadContext *tc,
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H A D | pseudo_inst.cc | 303 m5exit(ThreadContext *tc, Tick delay) 307 Tick when = curTick() + delay * SimClock::Int::ns; 313 m5fail(ThreadContext *tc, Tick delay, uint64_t code) 316 Tick when = curTick() + delay * SimClock::Int::ns; 435 resetstats(ThreadContext *tc, Tick delay, Tick period) 442 Tick when = curTick() + delay * SimClock::Int::ns; 443 Tick repeat = period * SimClock::Int::ns; 449 dumpstats(ThreadContext *tc, Tick delay, Tick perio [all...] |
/gem5/src/dev/serial/ |
H A D | uart8250.cc | 79 static const Tick interval = 225 * SimClock::Int::ns; 96 Tick 177 Tick 294 Tick rxintrwhen; 299 Tick txintrwhen; 316 Tick rxintrwhen; 317 Tick txintrwhen;
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Completed in 31 milliseconds
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