1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#include "dev/x86/i8237.hh"
32
33#include "mem/packet.hh"
34#include "mem/packet_access.hh"
35
36Tick
37X86ISA::I8237::read(PacketPtr pkt)
38{
39    assert(pkt->getSize() == 1);
40    Addr offset = pkt->getAddr() - pioAddr;
41    switch (offset) {
42      case 0x0:
43        panic("Read from i8237 channel 0 current address unimplemented.\n");
44      case 0x1:
45        panic("Read from i8237 channel 0 remaining "
46                "word count unimplemented.\n");
47      case 0x2:
48        panic("Read from i8237 channel 1 current address unimplemented.\n");
49      case 0x3:
50        panic("Read from i8237 channel 1 remaining "
51                "word count unimplemented.\n");
52      case 0x4:
53        panic("Read from i8237 channel 2 current address unimplemented.\n");
54      case 0x5:
55        panic("Read from i8237 channel 2 remaining "
56                "word count unimplemented.\n");
57      case 0x6:
58        panic("Read from i8237 channel 3 current address unimplemented.\n");
59      case 0x7:
60        panic("Read from i8237 channel 3 remaining "
61                "word count unimplemented.\n");
62      case 0x8:
63        panic("Read from i8237 status register unimplemented.\n");
64      default:
65        panic("Read from undefined i8237 register %d.\n", offset);
66    }
67    pkt->makeAtomicResponse();
68    return latency;
69}
70
71Tick
72X86ISA::I8237::write(PacketPtr pkt)
73{
74    assert(pkt->getSize() == 1);
75    Addr offset = pkt->getAddr() - pioAddr;
76    switch (offset) {
77      case 0x0:
78        panic("Write to i8237 channel 0 starting address unimplemented.\n");
79      case 0x1:
80        panic("Write to i8237 channel 0 starting "
81                "word count unimplemented.\n");
82      case 0x2:
83        panic("Write to i8237 channel 1 starting address unimplemented.\n");
84      case 0x3:
85        panic("Write to i8237 channel 1 starting "
86                "word count unimplemented.\n");
87      case 0x4:
88        panic("Write to i8237 channel 2 starting address unimplemented.\n");
89      case 0x5:
90        panic("Write to i8237 channel 2 starting "
91                "word count unimplemented.\n");
92      case 0x6:
93        panic("Write to i8237 channel 3 starting address unimplemented.\n");
94      case 0x7:
95        panic("Write to i8237 channel 3 starting "
96                "word count unimplemented.\n");
97      case 0x8:
98        panic("Write to i8237 command register unimplemented.\n");
99      case 0x9:
100        panic("Write to i8237 request register unimplemented.\n");
101      case 0xa:
102        {
103            uint8_t command = pkt->getLE<uint8_t>();
104            uint8_t select = bits(command, 1, 0);
105            uint8_t bitVal = bits(command, 2);
106            if (!bitVal)
107                panic("Turning on i8237 channels unimplemented.\n");
108            replaceBits(maskReg, select, bitVal);
109        }
110        break;
111      case 0xb:
112        panic("Write to i8237 mode register unimplemented.\n");
113      case 0xc:
114        panic("Write to i8237 clear LSB/MSB flip-flop "
115                "register unimplemented.\n");
116      case 0xd:
117        panic("Write to i8237 master clear/reset register unimplemented.\n");
118      case 0xe:
119        panic("Write to i8237 clear mask register unimplemented.\n");
120      case 0xf:
121        panic("Write to i8237 write all mask register bits unimplemented.\n");
122      default:
123        panic("Write to undefined i8237 register.\n");
124    }
125    pkt->makeAtomicResponse();
126    return latency;
127}
128
129void
130X86ISA::I8237::serialize(CheckpointOut &cp) const
131{
132    SERIALIZE_SCALAR(maskReg);
133}
134
135void
136X86ISA::I8237::unserialize(CheckpointIn &cp)
137{
138    UNSERIALIZE_SCALAR(maskReg);
139}
140
141X86ISA::I8237 *
142I8237Params::create()
143{
144    return new X86ISA::I8237(this);
145}
146