Searched defs:width (Results 26 - 45 of 45) sorted by relevance

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/gem5/src/systemc/utils/
H A Dvcd.cc133 VcdTraceValBase(int width) : TraceValBase(width) {} argument
198 VcdTraceVal(const T* t, const std::string &vcd_name, int width) : argument
622 addTraceVal(const unsigned char *v, const std::string &name, int width) argument
628 addTraceVal(const char *v, const std::string &name, int width) argument
633 addTraceVal(const unsigned short *v, const std::string &name, int width) argument
639 addTraceVal(const short *v, const std::string &name, int width) argument
644 addTraceVal(const unsigned int *v, const std::string &name, int width) argument
650 addTraceVal(const int *v, const std::string &name, int width) argument
655 addTraceVal(const unsigned long *v, const std::string &name, int width) argument
661 addTraceVal(const long *v, const std::string &name, int width) argument
667 addTraceVal(const sc_dt::int64 *v, const std::string &name, int width) argument
673 addTraceVal(const sc_dt::uint64 *v, const std::string &name, int width) argument
[all...]
/gem5/src/arch/arm/insts/
H A Dstatic_inst.hh98 satInt(int32_t &res, int64_t op, int width) argument
131 uSatInt(int32_t &res, int64_t op, int width) argument
[all...]
H A Dvfp.cc665 vfpUFixedToFpS(bool flush, bool defaultNan, uint64_t val, uint8_t width, uint8_t imm) argument
683 vfpSFixedToFpS(bool flush, bool defaultNan, int64_t val, uint8_t width, uint8_t imm) argument
703 vfpUFixedToFpD(bool flush, bool defaultNan, uint64_t val, uint8_t width, uint8_t imm) argument
722 vfpSFixedToFpD(bool flush, bool defaultNan, int64_t val, uint8_t width, uint8_t imm) argument
[all...]
H A Dvfp.hh265 vfpFpToFixed(T val, bool isSigned, uint8_t width, uint8_t imm, bool argument
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/gem5/util/tlm/src/
H A Dsc_master_port.cc151 unsigned width = trans.get_streaming_width(); local
/gem5/src/mem/
H A Dxbar.hh318 const uint32_t width; member in class:BaseXBar
/gem5/src/systemc/tlm_bridge/
H A Dtlm_to_gem5.cc246 unsigned width = trans.get_streaming_width(); local
/gem5/src/arch/hsail/insts/
H A Dmem.hh212 Brig::BrigWidth8_t width; member in class:HsailISA::LdInstBase
H A Ddecl.hh966 uint8_t width; member in class:HsailISA::Barrier
/gem5/src/sim/
H A Dprocess.cc405 Process::getSyscallArg(ThreadContext *tc, int &i, int width) argument
/gem5/ext/mcpat/cacti/
H A Dbasic_circuit.cc90 gate_C( double width, double wirelength, bool _is_dram, bool _is_cell, bool _is_wl_tr) argument
114 gate_C_pass( double width, double wirelength, bool _is_dram, bool _is_cell, bool _is_wl_tr) argument
138 drain_C_( double width, int nchannel, int stack, int next_arg_thresh_folding_width_or_height_cell, double fold_dimension, bool _is_dram, bool _is_cell, bool _is_wl_tr) argument
210 tr_R_on( double width, int nchannel, int stack, bool _is_dram, bool _is_cell, bool _is_wl_tr) argument
[all...]
H A Dcacti_interface.h478 double width; member in class:mem_array
/gem5/src/dev/arm/
H A Dpl111.hh275 uint16_t width; member in class:Pl111
/gem5/src/arch/arm/
H A Dprocess.cc497 ArmProcess32::getSyscallArg(ThreadContext *tc, int &i, int width) argument
516 ArmProcess64::getSyscallArg(ThreadContext *tc, int &i, int width) argument
H A Dtypes.hh666 Bitfield<4> width; member in namespace:ArmISA
H A Dmiscregs_types.hh71 Bitfield<4> width; // AArch64 member in namespace:ArmISA
/gem5/src/cpu/pred/
H A Dmultiperspective_perceptron.hh228 const int width; member in struct:MultiperspectivePerceptron::HistorySpec
485 GHIST(int p1, int p2, double coeff, int size, int width, argument
536 ACYCLIC(int p1, int p2, int p3, double coeff, int size, int width, argument
584 MODHIST(int p1, int p2, double coeff, int size, int width, argument
613 BIAS(double coeff, int size, int width, MultiperspectivePerceptron &mpp) argument
628 RECENCY(int p1, int p2, int p3, double coeff, int size, int width, MultiperspectivePerceptron &mpp) argument
670 IMLI(int p1, double coeff, int size, int width, MultiperspectivePerceptron &mpp) argument
691 PATH(int p1, int p2, int p3, double coeff, int size, int width, MultiperspectivePerceptron &mpp) argument
737 LOCAL(int p1, double coeff, int size, int width, MultiperspectivePerceptron &mpp) argument
759 MODPATH(int p1, int p2, int p3, double coeff, int size, int width, MultiperspectivePerceptron &mpp) argument
786 GHISTPATH(int p1, int p2, int p3, double coeff, int size, int width, MultiperspectivePerceptron &mpp) argument
858 GHISTMODPATH(int p1, int p2, int p3, double coeff, int size, int width, MultiperspectivePerceptron &mpp) argument
890 BLURRYPATH(int p1, int p2, int p3, double coeff, int size, int width, MultiperspectivePerceptron &mpp) argument
936 RECENCYPOS(int p1, double coeff, int size, int width, MultiperspectivePerceptron &mpp) argument
977 SGHISTPATH(int p1, int p2, int p3, double coeff, int size, int width, MultiperspectivePerceptron &mpp) argument
[all...]
/gem5/src/arch/x86/
H A Dprocess.cc1100 I386Process::getSyscallArg(ThreadContext *tc, int &i, int width) argument
/gem5/src/base/loader/
H A Dcoff_sym.h358 coff_int width; /* width for non-default sized struc fields */ member in union:__anon21
/gem5/src/arch/hsail/
H A DBrig_new.hpp1350 BrigWidth8_t width; member in struct:BrigInstBr
1382 BrigWidth8_t width; member in struct:BrigInstLane
1391 BrigWidth8_t width; member in struct:BrigInstMem
1514 BrigUInt64 width; //.acc=subItem<UInt64> //.wtype=UInt64 member in struct:BrigOperandConstantImage

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