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13978:896f9f7a1d16 |
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10-Apr-2019 |
Ciro Santilli <ciro.santilli@arm.com> |
arch-arm: implement VMINNM and VMAXNM SIMD version
This instruction is backported from aarch64.
In order to use the existing fplibMinNum backend, we first move VMIN and VPMIN to use fplib. Adding VMINNM is then trivial.
Change-Id: I404daabeb6079f60e51a648a06d5b3e54f1c24a9 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18689 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
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12104:edd63f9c6184 |
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05-Apr-2017 |
Nathanael Premillieu <nathanael.premillieu@arm.com> |
arch, cpu: Architectural Register structural indexing
Replace the unified register mapping with a structure associating a class and an index. It is now much easier to know which class of register the index is referring to. Also, when adding a new class there is no need to modify existing ones.
Change-Id: I55b3ac80763702aa2cd3ed2cbff0a75ef7620373 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> [ Fix RISCV build issues ] Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2700
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11671:520509f3e66c |
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13-Oct-2016 |
Mitch Hayenga <mitch.hayenga@arm.com> |
isa,arm: Add missing AArch32 FP instructions
This commit adds missing non-predicated, scalar floating point instructions. Specifically VRINT* floating point integer rounding instructions and VSEL* floating point conditional selects.
Change-Id: I23cbd1389f151389ac8beb28a7d18d5f93d000e7 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nathanael Premillieu <nathanael.premillieu@arm.com>
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10037:5cac77888310 |
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24-Jan-2014 |
ARM gem5 Developers |
arm: Add support for ARMv8 (AArch64 & AArch32)
Note: AArch64 and AArch32 interworking is not supported. If you use an AArch64 kernel you are restricted to AArch64 user-mode binaries. This will be addressed in a later patch.
Note: Virtualization is only supported in AArch32 mode. This will also be fixed in a later patch.
Contributors: Giacomo Gabrielli (TrustZone, LPAE, system-level AArch64, AArch64 NEON, validation) Thomas Grocutt (AArch32 Virtualization, AArch64 FP, validation) Mbou Eyole (AArch64 NEON, validation) Ali Saidi (AArch64 Linux support, code integration, validation) Edmund Grimley-Evans (AArch64 FP) William Wang (AArch64 Linux support) Rene De Jong (AArch64 Linux support, performance opt.) Matt Horsnell (AArch64 MP, validation) Matt Evans (device models, code integration, validation) Chris Adeniyi-Jones (AArch64 syscall-emulation) Prakash Ramrakhyani (validation) Dam Sunwoo (validation) Chander Sudanthi (validation) Stephan Diestelhorst (validation) Andreas Hansson (code integration, performance opt.) Eric Van Hensbergen (performance opt.) Gabe Black
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9918:2c7219e2d999 |
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15-Oct-2013 |
Steve Reinhardt <steve.reinhardt@amd.com> |
cpu: rename *_DepTag constants to *_Reg_Base
Make these names more meaningful.
Specifically, made these substitutions:
s/FP_Base_DepTag/FP_Reg_Base/g; s/Ctrl_Base_DepTag/Misc_Reg_Base/g; s/Max_DepTag/Max_Reg_Index/g;
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9550:e0e2c8f83d08 |
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19-Feb-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
scons: Fix up numerous warnings about name shadowing
This patch address the most important name shadowing warnings (as produced when using gcc/clang with -Wshadow). There are many locations where constructor parameters and function parameters shadow local variables, but these are left unchanged.
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9515:40a194c31c91 |
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15-Feb-2013 |
Ali Saidi <Ali.Saidi@ARM.com> |
ARM: Fix an issue with clang generating wrong code.
Clang generated executables would enter the if condition when it wasn't supposted to, resulting in the wrong simulated behavior. Implementing the operation this way is a bit faster anyway.
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7639:8c09b7ff5b57 |
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25-Aug-2010 |
Gabe Black <gblack@eecs.umich.edu> |
ARM: Implement all ARM SIMD instructions.
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7434:dd5a09b86b14 |
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02-Jun-2010 |
Gabe Black <gblack@eecs.umich.edu> |
ARM: Add a comment to vfp.cc that explains the asm statements.
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7430:db3e376f35d1 |
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02-Jun-2010 |
Gabe Black <gblack@eecs.umich.edu> |
ARM: Move code from vfp.hh to vfp.cc.
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7396:53454ef35b46 |
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02-Jun-2010 |
Gabe Black <gblack@eecs.umich.edu> |
ARM: Clean up the implementation of the VFP instructions.
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