| /gem5/src/arch/arm/ |
| H A D | system.hh | 178 virtual Addr fixFuncEventAddr(Addr addr) argument
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| /gem5/src/arch/x86/linux/ |
| H A D | process.cc | 126 uint64_t addr = process->getSyscallArg(tc, index); local
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| /gem5/src/arch/x86/ |
| H A D | pagetable_walker.cc | 95 Walker::startFunctional(ThreadContext * _tc, Addr &addr, unsigned &logBytes, argument
257 Walker::WalkerState::startFunctional(Addr &addr, unsigned &logBytes) argument
552 VAddr addr = vaddr; local
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| H A D | types.hh | 81 Bitfield<3> addr; member in namespace:X86ISA
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| /gem5/src/mem/ruby/profiler/ |
| H A D | AddressProfiler.cc | 44 lookupTraceForAddress(Addr addr, AddressMap& record_map) argument
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| /gem5/src/mem/ruby/slicc_interface/ |
| H A D | AbstractController.cc | 111 AbstractController::stallBuffer(MessageBuffer* buf, Addr addr) argument
125 AbstractController::wakeUpBuffers(Addr addr) argument
146 wakeUpAllBuffers(Addr addr) argument
206 blockOnQueue(Addr addr, MessageBuffer* port) argument
219 unblock(Addr addr) argument
228 isBlocked(Addr addr) argument
240 queueMemoryRead(const MachineID &id, Addr addr, Cycles latency) argument
264 queueMemoryWrite(const MachineID &id, Addr addr, Cycles latency, const DataBlock &block) argument
289 queueMemoryWritePartial(const MachineID &id, Addr addr, Cycles latency, const DataBlock &block, int size) argument
366 mapAddressToMachine(Addr addr, MachineType mtype) const argument
[all...] |
| /gem5/src/mem/ruby/network/ |
| H A D | MessageBuffer.cc | 326 MessageBuffer::reanalyzeMessages(Addr addr, Tick current_time) argument
364 MessageBuffer::stallMessage(Addr addr, Tick current_time) argument
[all...] |
| /gem5/src/dev/arm/ |
| H A D | Gic.py | 125 addr = Param.Addr("Address for frame PIO") variable in class:Gicv2mFrame
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| H A D | gic_v3_distributor.cc | 138 Gicv3Distributor::read(Addr addr, size_t size, bool is_secure_access) argument
507 write(Addr addr, uint64_t data, size_t size, bool is_secure_access) argument
[all...] |
| H A D | smmu_v3.cc | 485 const Addr addr = cmd.addr(); local
501 const Addr addr = cmd.addr(); local
518 const Addr addr = cmd.addr(); local
[all...] |
| H A D | smmu_v3_transl.cc | 66 SMMUTranslRequest::prefetch(Addr addr, uint32_t sid, uint32_t ssid) argument
647 walkCacheLookup( Yield &yield, const WalkCache::Entry *&walkEntry, Addr addr, uint16_t asid, uint16_t vmid, unsigned stage, unsigned level) argument
729 walkStage1And2(Yield &yield, Addr addr, const PageTableOps *pt_ops, unsigned level, Addr walkPtr) argument
813 walkStage2(Yield &yield, Addr addr, bool final_tr, const PageTableOps *pt_ops, unsigned level, Addr walkPtr) argument
879 translateStage1And2(Yield &yield, Addr addr) argument
935 translateStage2(Yield &yield, Addr addr, bool final_tr) argument
[all...] |
| /gem5/src/learning_gem5/part2/ |
| H A D | simple_cache.cc | 301 Addr addr = pkt->getAddr(); local
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| /gem5/ext/dnet/ |
| H A D | ip6.h | 93 ip6_addr_t addr[1]; /* up to 23 addresses */ member in struct:ip6_ext_data_routing0
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| /gem5/src/gpu-compute/ |
| H A D | hsail_code.hh | 427 findSymbol(Brig::BrigSegment segment, uint64_t addr) argument
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| H A D | wavefront.hh | 116 getLaneOffset(int lane, int addr) argument
134 getLaneAddr(int lane, int addr) argument
141 setLaneAddr(int lane, int addr, CType val) argument
309 readCallArgMem(int lane, int addr) argument
316 writeCallArgMem(int lane, int addr, CType val) argument
[all...] |
| /gem5/src/arch/hsail/insts/ |
| H A D | mem.hh | 94 AddrOperandType addr; member in class:HsailISA::LdaInstBase
214 AddrOperandType addr; member in class:HsailISA::LdInstBase
784 AddrOperandType addr; member in class:HsailISA::StInstBase
1218 AddrOperandType addr; member in class:HsailISA::AtomicInstBase
[all...] |
| /gem5/src/arch/sparc/ |
| H A D | faults.hh | 212 FastInstructionAccessMMUMiss(Addr addr) : vaddr(addr) argument
225 FastDataAccessMMUMiss(Addr addr) : vaddr(addr) argument
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| /gem5/src/sim/ |
| H A D | insttracer.hh | 83 Addr addr; ///< The address that was accessed member in class:Trace::InstRecord
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| H A D | pseudo_inst.cc | 359 Addr addr; local
373 addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr) argument
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| /gem5/src/dev/virtio/ |
| H A D | base.hh | 490 void setAddress(Addr addr) { _base = addr; } argument
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| /gem5/src/mem/ruby/system/ |
| H A D | Sequencer.cc | 686 Sequencer::checkCoherence(Addr addr) argument
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| H A D | GPUCoalescer.cc | 985 GPUCoalescer::checkCoherence(Addr addr) argument
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| /gem5/src/cpu/o3/ |
| H A D | lsq_impl.hh | 688 pushRequest(const DynInstPtr& inst, bool isLoad, uint8_t *data, unsigned int size, Addr addr, Request::Flags flags, uint64_t *res, AtomicOpFunctorPtr amo_op, const std::vector<bool>& byteEnable) argument
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| /gem5/src/cpu/kvm/ |
| H A D | base.cc | 886 BaseKvmCPU::setOneReg(uint64_t id, const void *addr) argument
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| /gem5/src/arch/arm/insts/ |
| H A D | macromem.cc | 87 uint32_t addr = 0; local
1461 int64_t addr = 0; local
[all...] |