/gem5/src/arch/null/ |
H A D | cpu_dummy.hh | 50 static void wakeup(ThreadID tid) { ; }
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/gem5/src/cpu/pred/ |
H A D | indirect.hh | 52 ThreadID tid) = 0; 54 InstSeqNum seq_num, ThreadID tid) = 0; 55 virtual void commit(InstSeqNum seq_num, ThreadID tid, 57 virtual void squash(InstSeqNum seq_num, ThreadID tid) = 0; 59 const TheISA::PCState& target, ThreadID tid) = 0; 60 virtual void genIndirectInfo(ThreadID tid, void* & indirect_history) = 0; 61 virtual void updateDirectionInfo(ThreadID tid, bool actually_taken) = 0; 62 virtual void deleteIndirectInfo(ThreadID tid, void * indirect_history) = 0; 63 virtual void changeDirectionPrediction(ThreadID tid,
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H A D | tage.hh | 78 virtual bool predict(ThreadID tid, Addr branch_pc, bool cond_branch, 86 void uncondBranch(ThreadID tid, Addr br_pc, void* &bp_history) override; 87 bool lookup(ThreadID tid, Addr branch_addr, void* &bp_history) override; 88 void btbUpdate(ThreadID tid, Addr branch_addr, void* &bp_history) override; 89 void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history, 92 virtual void squash(ThreadID tid, void *bp_history) override;
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H A D | bi_mode.hh | 60 void uncondBranch(ThreadID tid, Addr pc, void * &bp_history); 61 void squash(ThreadID tid, void *bp_history); 62 bool lookup(ThreadID tid, Addr branch_addr, void * &bp_history); 63 void btbUpdate(ThreadID tid, Addr branch_addr, void * &bp_history); 64 void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history, 68 void updateGlobalHistReg(ThreadID tid, bool taken);
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H A D | btb.hh | 55 ThreadID tid; 78 TheISA::PCState lookup(Addr instPC, ThreadID tid); 85 bool valid(Addr instPC, ThreadID tid); 93 ThreadID tid); 100 inline unsigned getIndex(Addr instPC, ThreadID tid);
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H A D | 2bit_local.hh | 69 virtual void uncondBranch(ThreadID tid, Addr pc, void * &bp_history); 78 bool lookup(ThreadID tid, Addr branch_addr, void * &bp_history); 87 void btbUpdate(ThreadID tid, Addr branch_addr, void * &bp_history); 94 void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history, 97 void squash(ThreadID tid, void *bp_history)
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H A D | simple_indirect.hh | 47 bool lookup(Addr br_addr, TheISA::PCState& br_target, ThreadID tid); 49 ThreadID tid); 50 void commit(InstSeqNum seq_num, ThreadID tid, void * indirect_history); 51 void squash(InstSeqNum seq_num, ThreadID tid); 53 const TheISA::PCState& target, ThreadID tid); 54 void genIndirectInfo(ThreadID tid, void* & indirect_history); 55 void updateDirectionInfo(ThreadID tid, bool actually_taken); 56 void deleteIndirectInfo(ThreadID tid, void * indirect_history); 57 void changeDirectionPrediction(ThreadID tid, void * indirect_history, 80 Addr getSetIndex(Addr br_addr, unsigned ghr, ThreadID ti [all...] |
H A D | tournament.hh | 79 bool lookup(ThreadID tid, Addr branch_addr, void * &bp_history); 87 void uncondBranch(ThreadID tid, Addr pc, void * &bp_history); 95 void btbUpdate(ThreadID tid, Addr branch_addr, void * &bp_history); 108 void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history, 116 void squash(ThreadID tid, void *bp_history); 133 inline void updateGlobalHistTaken(ThreadID tid); 136 inline void updateGlobalHistNotTaken(ThreadID tid);
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H A D | ltage.hh | 69 void squash(ThreadID tid, void *bp_history) override; 70 void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history, 112 ThreadID tid, Addr branch_pc, bool cond_branch, void* &b) override;
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H A D | bpred_unit.hh | 95 TheISA::PCState &pc, ThreadID tid); 98 virtual void uncondBranch(ThreadID tid, Addr pc, void * &bp_history) = 0; 106 void update(const InstSeqNum &done_sn, ThreadID tid); 114 void squash(const InstSeqNum &squashed_sn, ThreadID tid); 127 bool actually_taken, ThreadID tid); 133 virtual void squash(ThreadID tid, void *bp_history) = 0; 142 virtual bool lookup(ThreadID tid, Addr instPC, void * &bp_history) = 0; 152 virtual void btbUpdate(ThreadID tid, Addr instPC, void * &bp_history) = 0; 183 virtual void update(ThreadID tid, Addr instPC, bool taken, 206 void *indirect_history, ThreadID _ti [all...] |
/gem5/src/cpu/ |
H A D | smt.hh | 61 void change_thread_state(ThreadID tid, int activate, int priority);
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H A D | base.hh | 226 getInterruptController(ThreadID tid) 235 virtual void wakeup(ThreadID tid) = 0; 238 postInterrupt(ThreadID tid, int int_num, int index) 246 clearInterrupt(ThreadID tid, int int_num, int index) 252 clearInterrupts(ThreadID tid) 285 virtual void activateContext(ThreadID thread_num); 289 virtual void suspendContext(ThreadID thread_num); 292 virtual void haltContext(ThreadID thread_num); 306 ThreadID contextToThread(ContextID cid) 307 { return static_cast<ThreadID>(ci [all...] |
/gem5/src/cpu/o3/ |
H A D | rob.hh | 98 void setActiveThreads(std::list<ThreadID> *at_ptr); 123 const DynInstPtr &readHeadInst(ThreadID tid); 128 DynInstPtr findInst(ThreadID tid, InstSeqNum squash_inst); 140 DynInstPtr readTailInst(ThreadID tid); 148 void retireHead(ThreadID tid); 154 bool isHeadReady(ThreadID tid); 163 int entryAmount(ThreadID num_threads); 169 unsigned numFreeEntries(ThreadID tid); 172 unsigned getMaxEntries(ThreadID tid) 176 unsigned getThreadEntries(ThreadID ti [all...] |
H A D | decode.hh | 107 void clearStates(ThreadID tid); 127 void setActiveThreads(std::list<ThreadID> *at_ptr); 148 void decode(bool &status_change, ThreadID tid); 155 void decodeInsts(ThreadID tid); 161 void skidInsert(ThreadID tid); 175 void readStallSignals(ThreadID tid); 178 bool checkSignalsAndUpdate(ThreadID tid); 181 bool checkStall(ThreadID tid) const; 190 bool block(ThreadID tid); 196 bool unblock(ThreadID ti [all...] |
H A D | cpu.hh | 231 void activateThread(ThreadID tid); 234 void deactivateThread(ThreadID tid); 237 void insertThread(ThreadID tid); 240 void removeThread(ThreadID tid); 249 void activateContext(ThreadID tid) override; 252 void suspendContext(ThreadID tid) override; 257 void haltContext(ThreadID tid) override; 265 void serializeThread(CheckpointOut &cp, ThreadID tid) const override; 266 void unserializeThread(CheckpointIn &cp, ThreadID tid) override; 269 void addThreadToExitingList(ThreadID ti [all...] |
H A D | fetch.hh | 214 std::list<ThreadID> priorityList; 238 void setActiveThreads(std::list<ThreadID> *at_ptr); 247 void clearStates(ThreadID tid); 276 void drainStall(ThreadID tid); 282 void deactivateThread(ThreadID tid); 319 bool fetchCacheLine(Addr vaddr, ThreadID tid, Addr pc); 333 const DynInstPtr squashInst, ThreadID tid); 340 const InstSeqNum seq_num, ThreadID tid); 343 bool checkStall(ThreadID tid) const; 355 DynInstPtr squashInst, ThreadID ti [all...] |
H A D | commit.hh | 140 void processTrapEvent(ThreadID tid); 179 void setActiveThreads(std::list<ThreadID> *at_ptr); 191 void clearStates(ThreadID tid); 209 void deactivateThread(ThreadID tid); 220 size_t numROBFreeEntries(ThreadID tid); 223 void generateTrapEvent(ThreadID tid, Fault inst_fault); 228 void generateTCEvent(ThreadID tid); 243 void squashAll(ThreadID tid); 246 void squashFromTrap(ThreadID tid); 249 void squashFromTC(ThreadID ti [all...] |
H A D | rename.hh | 173 void clearStates(ThreadID tid); 176 void setActiveThreads(std::list<ThreadID> *at_ptr); 197 void squash(const InstSeqNum &squash_seq_num, ThreadID tid); 216 void rename(bool &status_change, ThreadID tid); 221 void renameInsts(ThreadID tid); 226 void skidInsert(ThreadID tid); 243 bool block(ThreadID tid); 249 bool unblock(ThreadID tid); 252 void doSquash(const InstSeqNum &squash_seq_num, ThreadID tid); 255 void removeFromHistory(InstSeqNum inst_seq_num, ThreadID ti [all...] |
H A D | rob_impl.hh | 69 for (ThreadID tid = 0; tid < numThreads; tid++) { 80 for (ThreadID tid = 0; tid < numThreads; tid++) { 90 for (ThreadID tid = 0; tid < numThreads; tid++) { 95 for (ThreadID tid = numThreads; tid < Impl::MaxThreads; tid++) { 106 for (ThreadID tid = 0; tid < Impl::MaxThreads; tid++) { 129 ROB<Impl>::setActiveThreads(list<ThreadID> *at_ptr) 139 for (ThreadID tid = 0; tid < numThreads; tid++) 158 list<ThreadID>::iterator threads = activeThreads->begin(); 159 list<ThreadID>::iterator end = activeThreads->end(); 162 ThreadID ti [all...] |
H A D | lsq_impl.hh | 105 for (ThreadID tid = 0; tid < numThreads; tid++) { 125 for (ThreadID tid = 0; tid < numThreads; tid++) { 132 LSQ<Impl>::setActiveThreads(list<ThreadID> *at_ptr) 144 for (ThreadID tid = 0; tid < numThreads; tid++) 174 for (ThreadID tid = 0; tid < numThreads; tid++) { 234 ThreadID tid = load_inst->threadNumber; 243 ThreadID tid = store_inst->threadNumber; 252 ThreadID tid = inst->threadNumber; 261 ThreadID tid = inst->threadNumber; 270 list<ThreadID> [all...] |
/gem5/src/cpu/minor/ |
H A D | cpu.hh | 131 void wakeup(ThreadID tid) override; 145 void serializeThread(CheckpointOut &cp, ThreadID tid) const override; 146 void unserializeThread(CheckpointIn &cp, ThreadID tid) override; 165 void activateContext(ThreadID thread_id) override; 166 void suspendContext(ThreadID thread_id) override; 169 std::vector<ThreadID> roundRobinPriority(ThreadID priority) 171 std::vector<ThreadID> prio_list; 172 for (ThreadID i = 1; i <= numThreads; i++) { 178 std::vector<ThreadID> randomPriorit [all...] |
H A D | execute.hh | 202 ThreadID interruptPriority; 203 ThreadID issuePriority; 204 ThreadID commitPriority; 211 const ForwardInstData *getInput(ThreadID tid); 214 void popInput(ThreadID tid); 223 void updateBranchData(ThreadID tid, BranchData::Reason reason, 251 bool isInterrupted(ThreadID thread_id) const; 254 bool isInbetweenInsts(ThreadID thread_id) const; 258 bool takeInterrupt(ThreadID thread_id, BranchData &branch); 261 unsigned int issue(ThreadID thread_i [all...] |
H A D | decode.hh | 128 ThreadID threadPriority; 132 const ForwardInstData *getInput(ThreadID tid); 135 void popInput(ThreadID tid); 139 ThreadID getScheduledThread();
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/gem5/src/arch/mips/ |
H A D | isa.hh | 80 unsigned getVPENum(ThreadID tid) const; 90 void updateCP0ReadView(int misc_reg, ThreadID tid) { } 91 RegVal readMiscRegNoEffect(int misc_reg, ThreadID tid = 0) const; 94 RegVal readMiscReg(int misc_reg, ThreadContext *tc, ThreadID tid = 0); 97 void setRegMask(int misc_reg, RegVal val, ThreadID tid = 0); 98 void setMiscRegNoEffect(int misc_reg, RegVal val, ThreadID tid=0); 102 ThreadContext *tc, ThreadID tid=0);
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/gem5/src/arch/alpha/ |
H A D | isa.hh | 77 RegVal readMiscRegNoEffect(int misc_reg, ThreadID tid = 0) const; 78 RegVal readMiscReg(int misc_reg, ThreadContext *tc, ThreadID tid = 0); 80 void setMiscRegNoEffect(int misc_reg, RegVal val, ThreadID tid=0); 82 ThreadID tid=0);
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