| /gem5/src/cpu/ |
| H A D | inteltrace.hh | 49 const StaticInstPtr _staticInst, TheISA::PCState _pc,
51 : InstRecord(_when, _thread, _staticInst, _pc,
48 IntelTraceRecord(Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, TheISA::PCState _pc, const StaticInstPtr _macroStaticInst = NULL) argument
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| H A D | exetrace.hh | 51 const StaticInstPtr _staticInst, TheISA::PCState _pc,
53 : InstRecord(_when, _thread, _staticInst, _pc, _macroStaticInst)
50 ExeTracerRecord(Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, TheISA::PCState _pc, const StaticInstPtr _macroStaticInst = NULL) argument
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| H A D | nativetrace.hh | 58 const StaticInstPtr _staticInst, TheISA::PCState _pc,
60 : ExeTracerRecord(_when, _thread, _staticInst, _pc, _macroStaticInst),
56 NativeTraceRecord(NativeTrace * _parent, Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, TheISA::PCState _pc, const StaticInstPtr _macroStaticInst = NULL) argument
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| H A D | base_dyn_inst_impl.hh | 64 TheISA::PCState _pc, TheISA::PCState _predPC,
76 pc = _pc;
62 BaseDynInst(const StaticInstPtr &_staticInst, const StaticInstPtr &_macroop, TheISA::PCState _pc, TheISA::PCState _predPC, InstSeqNum seq_num, ImplCPU *cpu) argument
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| /gem5/src/arch/generic/ |
| H A D | types.hh | 57 Addr _pc; member in class:GenericISA::PCStateBase
60 PCStateBase() : _pc(0), _npc(0) {}
61 PCStateBase(Addr val) : _pc(0), _npc(0) { set(val); }
72 return _pc;
108 return _pc == opc._pc && _npc == opc._npc;
120 SERIALIZE_SCALAR(_pc); variable
127 UNSERIALIZE_SCALAR(_pc); variable
148 Addr pc() const { return _pc; }
149 void pc(Addr val) { _pc
328 Base::_pc = Base::_npc; member in class:GenericISA::DelaySlotPCState::Base
[all...] |
| /gem5/src/arch/arm/tracers/ |
| H A D | tarmac_tracer.hh | 66 ArmISA::PCState _pc)
67 : thread(_thread), staticInst(_staticInst), pc(_pc)
64 TarmacContext(ThreadContext* _thread, const StaticInstPtr _staticInst, ArmISA::PCState _pc) argument
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| H A D | tarmac_base.cc | 56 PCState _pc,
58 : InstRecord(_when, _thread, _staticInst, _pc, _macroStaticInst)
54 TarmacBaseRecord(Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, PCState _pc, const StaticInstPtr _macroStaticInst) argument
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| H A D | tarmac_parser.hh | 98 ArmISA::PCState _pc,
101 parent(_parent), thread(_thread), inst(_inst), pc(_pc),
136 const StaticInstPtr _staticInst, ArmISA::PCState _pc,
95 TarmacParserRecordEvent(TarmacParser& _parent, ThreadContext *_thread, const StaticInstPtr _inst, ArmISA::PCState _pc, bool _mismatch, bool _mismatch_on_pc_or_opcode) argument
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| H A D | tarmac_record_v8.hh | 133 const StaticInstPtr _staticInst, ArmISA::PCState _pc,
136 : TarmacTracerRecord(_when, _thread, _staticInst, _pc,
132 TarmacTracerRecordV8(Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, ArmISA::PCState _pc, TarmacTracer& _parent, const StaticInstPtr _macroStaticInst = NULL) argument
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| H A D | tarmac_base.hh | 126 const StaticInstPtr _staticInst, ArmISA::PCState _pc,
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| H A D | tarmac_record.cc | 109 PCState _pc,
113 _pc, _macroStaticInst),
107 TarmacTracerRecord(Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, PCState _pc, TarmacTracer& _tracer, const StaticInstPtr _macroStaticInst) argument
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| H A D | tarmac_record.hh | 181 const StaticInstPtr _staticInst, ArmISA::PCState _pc,
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| H A D | tarmac_parser.cc | 760 PCState _pc,
764 _pc, _macroStaticInst),
758 TarmacParserRecord(Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, PCState _pc, TarmacParser& _parent, const StaticInstPtr _macroStaticInst) argument
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| /gem5/src/mem/ruby/slicc_interface/ |
| H A D | RubyRequest.hh | 66 uint64_t _pc, RubyRequestType _type, RubyAccessMode _access_mode,
74 m_ProgramCounter(_pc),
88 uint64_t _pc, RubyRequestType _type,
98 m_ProgramCounter(_pc),
115 uint64_t _pc, RubyRequestType _type,
126 m_ProgramCounter(_pc),
65 RubyRequest(Tick curTime, uint64_t _paddr, uint8_t* _data, int _len, uint64_t _pc, RubyRequestType _type, RubyAccessMode _access_mode, PacketPtr _pkt, PrefetchBit _pb = PrefetchBit_No, ContextID _proc_id = 100, ContextID _core_id = 99, HSAScope _scope = HSAScope_UNSPECIFIED, HSASegment _segment = HSASegment_GLOBAL) argument
87 RubyRequest(Tick curTime, uint64_t _paddr, uint8_t* _data, int _len, uint64_t _pc, RubyRequestType _type, RubyAccessMode _access_mode, PacketPtr _pkt, PrefetchBit _pb, unsigned _proc_id, unsigned _core_id, int _wm_size, std::vector<bool> & _wm_mask, DataBlock & _Data, HSAScope _scope = HSAScope_UNSPECIFIED, HSASegment _segment = HSASegment_GLOBAL) argument
114 RubyRequest(Tick curTime, uint64_t _paddr, uint8_t* _data, int _len, uint64_t _pc, RubyRequestType _type, RubyAccessMode _access_mode, PacketPtr _pkt, PrefetchBit _pb, unsigned _proc_id, unsigned _core_id, int _wm_size, std::vector<bool> & _wm_mask, DataBlock & _Data, std::vector< std::pair<int,AtomicOpFunctor*> > _atomicOps, HSAScope _scope = HSAScope_UNSPECIFIED, HSASegment _segment = HSASegment_GLOBAL) argument
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| /gem5/src/mem/ |
| H A D | request.hh | 386 Addr _pc; variable
404 _extraData(0), _contextId(0), _pc(0),
413 _extraData(0), _contextId(0), _pc(0),
430 _extraData(0), _contextId(0), _pc(0),
440 _extraData(0), _contextId(0), _pc(0),
451 _extraData(0), _contextId(0), _pc(pc),
463 _extraData(0), _contextId(0), _pc(0),
488 _pc(other._pc), _reqInstSeqNum(other._reqInstSeqNum),
536 _pc
[all...] |
| /gem5/src/sim/ |
| H A D | insttracer.hh | 152 TheISA::PCState _pc,
154 : when(_when), thread(_thread), staticInst(_staticInst), pc(_pc),
150 InstRecord(Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, TheISA::PCState _pc, const StaticInstPtr _macroStaticInst = NULL) argument
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| /gem5/src/arch/alpha/ |
| H A D | faults.hh | 238 ItbFault(Addr _pc) : pc(_pc) { } argument
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| /gem5/src/cpu/pred/ |
| H A D | multiperspective_perceptron.hh | 113 MPPBranchInfo(Addr _pc, int pcshift, bool cb) : pc((unsigned int)_pc), argument
|