Searched refs:setFloatReg (Results 1 - 24 of 24) sorted by relevance

/gem5/src/arch/mips/
H A Dremote_gdb.cc200 for (int i = 0; i < 32; i++) context->setFloatReg(i, r.fpr[i]);
201 context->setFloatReg(FLOATREG_FCCR, r.fsr);
202 context->setFloatReg(FLOATREG_FIR, r.fir);
H A Dutility.cc228 cpu->thread->setFloatReg(ZeroReg, 0);
H A Dmt.hh94 return otc->setFloatReg(reg.index(), val);
/gem5/src/arch/power/
H A Dutility.cc50 dest->setFloatReg(i, src->readFloatReg(i));
H A Dremote_gdb.cc206 context->setFloatReg(i, r.fpr[i]);
/gem5/src/arch/alpha/
H A Dutility.cc73 dest->setFloatReg(i, src->readFloatReg(i));
H A Dremote_gdb.cc246 context->setFloatReg(i, gdbregs.regs64[i + KGDB_REG_F0]);
H A Dev5.cc91 cpu->thread->setFloatReg(ZeroReg, 0);
/gem5/src/cpu/checker/
H A Dthread_context.hh354 setFloatReg(RegIndex reg_idx, RegVal val) override
356 actualTC->setFloatReg(reg_idx, val);
357 checkerTC->setFloatReg(reg_idx, val);
H A Dcpu_impl.hh211 thread->setFloatReg(ZeroReg, 0);
612 thread->setFloatReg(idx.index(), mismatch_val.asInteger());
647 thread->setFloatReg(idx.index(), res.asInteger());
H A Dcpu.hh379 thread->setFloatReg(reg.index(), val);
/gem5/src/cpu/minor/
H A Dexec_context.hh103 thread.setFloatReg(TheISA::ZeroReg, 0);
212 thread.setFloatReg(reg.index(), val);
/gem5/src/arch/sparc/
H A Dutility.cc235 dest->setFloatReg(i, src->readFloatReg(i));
/gem5/src/cpu/o3/
H A Dregfile.hh317 setFloatReg(PhysRegIdPtr phys_reg, RegVal val) function in class:PhysRegFile
H A Ddyn_inst.hh396 this->cpu->setFloatReg(this->_destRegIdx[idx], val);
H A Dthread_context.hh319 setFloatReg(RegIndex reg_idx, RegVal val) override
H A Dcpu.cc1275 FullO3CPU<Impl>::setFloatReg(PhysRegIdPtr phys_reg, RegVal val) function in class:FullO3CPU
1278 regFile.setFloatReg(phys_reg, val);
1416 regFile.setFloatReg(phys_reg, val);
H A Dcpu.hh414 void setFloatReg(PhysRegIdPtr phys_reg, RegVal val);
/gem5/src/cpu/
H A Dthread_context.hh255 virtual void setFloatReg(RegIndex reg_idx, RegVal val) = 0;
H A Dsimple_thread.hh469 setFloatReg(RegIndex reg_idx, RegVal val) override
/gem5/src/cpu/kvm/
H A Dx86_cpu.cc1053 tc->setFloatReg(FLOATREG_FPR(reg_idx), floatToBits64(value));
1071 tc->setFloatReg(FLOATREG_XMM_LOW(i), *(uint64_t *)&fpu.xmm[i][0]);
1072 tc->setFloatReg(FLOATREG_XMM_HIGH(i), *(uint64_t *)&fpu.xmm[i][8]);
/gem5/src/arch/arm/kvm/
H A Darmv8_cpu.cc329 tc->setFloatReg(reg_base + j, reg.s[j].i);
/gem5/src/cpu/simple/
H A Dexec_context.hh215 thread->setFloatReg(reg.index(), val);
H A Dbase.cc494 thread->setFloatReg(ZeroReg, 0);

Completed in 48 milliseconds