| /gem5/src/dev/arm/ |
| H A D | kmi.hh | 119 void updateIntCtrl(InterruptReg ints, ControlReg ctrl);
122 void setControl(ControlReg ctrl) { updateIntCtrl(rawInterrupts, ctrl); } argument
|
| H A D | kmi.cc | 179 Pl050::updateIntCtrl(InterruptReg ints, ControlReg ctrl) argument
182 control = ctrl;
187 DPRINTF(Pl050, "Generate interrupt: rawInt=%#x ctrl=%#x int=%#x\n",
191 DPRINTF(Pl050, "Clear interrupt: rawInt=%#x ctrl=%#x int=%#x\n",
|
| /gem5/src/python/m5/util/ |
| H A D | dot_writer_ruby.py | 96 ctrl = link.ext_node
97 label = ctrl._name
98 if hasattr(ctrl, '_node_type'):
99 label += ' (' + ctrl._node_type + ')'
101 _dot_create_ctrl_node(ctrl.path(), label)
|
| /gem5/configs/common/ |
| H A D | MemConfig.py | 115 ctrl = cls()
121 ctrl.channels = nbr_mem_ctrls
126 if ctrl.addr_mapping.value == 'RoRaBaChCo':
131 rowbuffer_size = ctrl.device_rowbuffer_size.value * \
132 ctrl.devices_per_rank.value
138 ctrl.range = m5.objects.AddrRange(r.start, size = r.size(),
145 return ctrl
|
| /gem5/ext/systemc/src/sysc/datatypes/int/ |
| H A D | sc_nbutils.cpp | 246 sc_digit ctrl; // Control word now assembling. local
303 ctrl = 0;
306 ctrl = ctrl << 1;
311 case 'x': ctrl = ctrl | 1; data = data | 1; break;
314 case 'z': ctrl = ctrl | 1; break;
326 if ( ctrl_p ) ctrl_p[word_i] = ctrl;
334 ctrl
380 sc_digit ctrl; // Control word now assembling. local
[all...] |
| /gem5/src/systemc/dt/int/ |
| H A D | sc_nbutils.cc | 260 sc_digit ctrl; // Control word now assembling. local
310 ctrl = 0;
312 ctrl = ctrl << 1;
316 case 'x': ctrl = ctrl | 1; data = data | 1; break;
319 case 'z': ctrl = ctrl | 1; break;
334 ctrl_p[word_i] = ctrl;
340 ctrl
388 sc_digit ctrl; // Control word now assembling. local
[all...] |
| /gem5/src/dev/storage/ |
| H A D | ide_disk.cc | 70 : SimObject(p), ctrl(NULL), image(p->image), diskDelay(p->delay),
196 return ctrl->isDiskSelected(this);
202 if (ctrl)
203 return ctrl->pciToDma(pciAddr);
353 if (ctrl->dmaPending() || ctrl->drainState() != DrainState::Running) {
357 ctrl->dmaRead(curPrdAddr, sizeof(PrdEntry_t), &dmaPrdReadEvent,
449 if (ctrl->dmaPending() || ctrl->drainState() != DrainState::Running) {
454 ctrl
[all...] |
| H A D | ide_disk.hh | 211 IdeController *ctrl; member in class:IdeDisk
286 if (ctrl) panic("Cannot change the controller once set!\n");
287 ctrl = c;
|
| /gem5/configs/dram/ |
| H A D | lat_mem_rd.py | 125 for ctrl in system.mem_ctrls:
126 ctrl.null = True
130 if isinstance(ctrl, m5.objects.DRAMCtrl):
133 ctrl.tREFI = '100s'
|
| /gem5/src/systemc/tests/systemc/1666-2011-compliance/child_proc_control/ |
| H A D | child_proc_control.cpp | 48 SC_THREAD(ctrl);
81 void ctrl() function in struct:Top
|
| /gem5/src/systemc/tests/systemc/1666-2011-compliance/mixed_child_procs/ |
| H A D | mixed_child_procs.cpp | 52 SC_THREAD(ctrl);
93 void ctrl() function in struct:Top
|
| /gem5/src/dev/pci/ |
| H A D | copy_engine_defs.hh | 156 CHANCTRL ctrl; member in struct:CopyEngineReg::ChanRegs
202 paramOut(cp, "ctrl", ctrl._data);
212 paramIn(cp, "ctrl", ctrl._data);
|
| H A D | copy_engine.cc | 247 pkt->setLE<uint16_t>(cr.ctrl());
248 cr.ctrl.in_use(1);
376 old_int_disable = cr.ctrl.interrupt_disable();
377 cr.ctrl(pkt->getLE<uint16_t>());
378 if (cr.ctrl.interrupt_disable())
379 cr.ctrl.interrupt_disable(0);
381 cr.ctrl.interrupt_disable(old_int_disable);
|
| /gem5/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl/ |
| H A D | proc_ctrl.cpp | 58 SC_THREAD(ctrl);
80 void ctrl()
function
|
| /gem5/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_elab/ |
| H A D | proc_ctrl_elab.cpp | 67 SC_THREAD(ctrl);
283 void ctrl()
function
|
| /gem5/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_immed/ |
| H A D | proc_ctrl_immed.cpp | 49 SC_THREAD(ctrl);
96 void ctrl() function in struct:Top
|
| /gem5/src/systemc/tests/systemc/1666-2011-compliance/async_reset_port/ |
| H A D | async_reset_port.cpp | 205 SC_THREAD(ctrl);
228 void ctrl() function in struct:Top
|
| /gem5/src/systemc/tests/systemc/1666-2011-compliance/method_with_reset/ |
| H A D | method_with_reset.cpp | 47 SC_THREAD(ctrl);
79 void ctrl() function in struct:Top
|
| /gem5/src/dev/net/ |
| H A D | i8254xGBe.cc | 81 regs.ctrl.fd(1);
82 regs.ctrl.lrst(1);
83 regs.ctrl.speed(2);
84 regs.ctrl.frcspd(1);
193 pkt->setLE<uint32_t>(regs.ctrl());
386 regs.ctrl = val;
387 if (regs.ctrl.tfce())
389 if (regs.ctrl.rfce())
|
| H A D | i8254xGBe_defs.hh | 352 CTRL ctrl; member in struct:iGbReg::Regs
766 paramOut(cp, "ctrl", ctrl._data);
812 paramIn(cp, "ctrl", ctrl._data);
|
| /gem5/src/systemc/tests/systemc/1666-2011-compliance/async_reset/ |
| H A D | async_reset.cpp | 47 SC_THREAD(ctrl);
115 void ctrl() function in struct:Top
|