/gem5/src/arch/riscv/ |
H A D | utility.cc | 38 void initCPU(ThreadContext *tc, int cpuId) argument
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H A D | utility.hh | 120 inline void startupCPU(ThreadContext *tc, int cpuId) argument 192 void initCPU(ThreadContext *tc, int cpuId);
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/gem5/src/arch/null/ |
H A D | utility.hh | 51 inline void startupCPU(ThreadContext *tc, int cpuId) {} argument
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/gem5/src/arch/power/ |
H A D | utility.hh | 60 startupCPU(ThreadContext *tc, int cpuId) argument 95 void initCPU(ThreadContext *, int cpuId);
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H A D | utility.cc | 76 initCPU(ThreadContext *tc, int cpuId) argument
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/gem5/src/arch/alpha/ |
H A D | utility.hh | 70 inline void startupCPU(ThreadContext *tc, int cpuId) argument 98 void initIPRs(ThreadContext *tc, int cpuId); 99 void initCPU(ThreadContext *tc, int cpuId);
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H A D | ev5.cc | 69 initCPU(ThreadContext *tc, int cpuId) argument 71 initIPRs(tc, cpuId); 73 tc->setIntReg(16, cpuId); 74 tc->setIntReg(0, cpuId); 99 initIPRs(ThreadContext *tc, int cpuId) argument 107 tc->setMiscRegNoEffect(IPR_PALtemp16, cpuId);
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/gem5/src/arch/sparc/ |
H A D | utility.hh | 72 void initCPU(ThreadContext *tc, int cpuId); 75 startupCPU(ThreadContext *tc, int cpuId) argument 78 if (cpuId == 0 || !FullSystem)
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H A D | utility.cc | 258 initCPU(ThreadContext *tc, int cpuId) argument 261 if (cpuId == 0)
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/gem5/src/arch/x86/ |
H A D | utility.hh | 79 void initCPU(ThreadContext *tc, int cpuId); 81 void startupCPU(ThreadContext *tc, int cpuId);
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H A D | utility.cc | 74 void initCPU(ThreadContext *tc, int cpuId) argument 182 lApicBase.bsp = (cpuId == 0); 189 interrupts->setRegNoEffect(APIC_ID, cpuId << 24); 201 void startupCPU(ThreadContext *tc, int cpuId) argument 203 if (cpuId == 0 || !FullSystem) {
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/gem5/src/arch/arm/tracers/ |
H A D | tarmac_tracer.cc | 52 auto id = thread->getCpuPtr()->cpuId();
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H A D | tarmac_parser.hh | 223 cpuId(p->cpu_id), 288 bool cpuId; member in class:Trace::TarmacParser
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/gem5/src/arch/mips/ |
H A D | utility.hh | 109 void startupCPU(ThreadContext *tc, int cpuId); 110 void initCPU(ThreadContext *tc, int cpuId);
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H A D | utility.cc | 232 startupCPU(ThreadContext *tc, int cpuId) argument 238 initCPU(ThreadContext *tc, int cpuId) argument
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/gem5/src/cpu/ |
H A D | thread_state.hh | 70 int cpuId() const { return baseCpu->cpuId(); } function in struct:ThreadState
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H A D | inst_pb_trace.cc | 160 curMsg->set_cpuid(tc->cpuId());
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H A D | thread_context.cc | 119 int id1 = one->cpuId(); 120 int id2 = two->cpuId();
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/gem5/src/dev/arm/ |
H A D | gic_v3_redistributor.hh | 67 uint32_t cpuId; member in class:Gicv3Redistributor 211 return cpuId;
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H A D | gic_v3_redistributor.cc | 58 cpuId(cpu_id), 84 cpuInterface = gic->getCPUInterface(cpuId); 164 int last = cpuId == (gic->getSystem()->numContexts() - 1); 165 return (affinity << 32) | (1 << 24) | (cpuId << 8) | 983 ThreadContext * tc = gic->getSystem()->getThreadContext(cpuId);
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H A D | gic_v3_cpu_interface.cc | 59 cpuId(cpu_id) 68 redistributor = gic->getRedistributor(cpuId); 2048 gic->postInt(cpuId, ArmISA::INT_IRQ); 2050 gic->deassertInt(cpuId, ArmISA::INT_IRQ); 2054 gic->postInt(cpuId, ArmISA::INT_FIQ); 2056 gic->deassertInt(cpuId, ArmISA::INT_FIQ); 2091 gic->postInt(cpuId, ArmISA::INT_VIRT_IRQ); 2093 gic->deassertInt(cpuId, ArmISA::INT_VIRT_IRQ); 2099 gic->postInt(cpuId, ArmISA::INT_VIRT_FIQ); 2101 gic->deassertInt(cpuId, ArmIS [all...] |
/gem5/src/sim/ |
H A D | pseudo_inst.cc | 625 int cpuId = tc->getCpuPtr()->cpuId(); local 628 sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) { 650 if (cpuId == params->work_begin_cpu_id_exit) { 687 int cpuId = tc->getCpuPtr()->cpuId(); local 690 sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
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/gem5/src/arch/arm/ |
H A D | utility.hh | 105 inline void startupCPU(ThreadContext *tc, int cpuId) argument 118 void initCPU(ThreadContext *tc, int cpuId);
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H A D | utility.cc | 58 initCPU(ThreadContext *tc, int cpuId) argument 267 assert((0 <= tc->cpuId()) && (tc->cpuId() < 256)); 275 tc->cpuId() | tc->socketId() << 8; 279 tc->cpuId() | tc->socketId() << 8;
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/gem5/src/cpu/o3/ |
H A D | thread_context.hh | 105 int cpuId() const override { return cpu->cpuId(); }
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