Searched refs:cls (Results 1 - 25 of 56) sorted by relevance

123

/gem5/configs/ruby/
H A DCntrlBase.py32 def seqCount(cls):
39 def cntrlCount(cls):
46 def versionCount(cls):
47 cls._version += 1 # Use count for this particular type
48 return cls._version - 1
/gem5/configs/common/
H A DBPConfig.py45 def is_bp_class(cls):
51 return issubclass(cls, m5.objects.BranchPredictor) and \
52 not cls.abstract
71 for name, cls in _bp_classes.items():
76 doc = inspect.getdoc(cls)
86 for name, cls in inspect.getmembers(m5.objects, is_bp_class):
87 _bp_classes[name] = cls
95 def is_indirect_bp_class(cls):
102 return issubclass(cls, m5.objects.IndirectPredictor) and \
103 not cls
[all...]
H A DHWPConfig.py45 def is_hwp_class(cls):
51 return issubclass(cls, m5.objects.BasePrefetcher) and \
52 not cls.abstract
71 for name, cls in _hwp_classes.items():
76 doc = inspect.getdoc(cls)
86 for name, cls in inspect.getmembers(m5.objects, is_hwp_class):
87 _hwp_classes[name] = cls
H A DCpuConfig.py51 def is_cpu_class(cls):
57 return issubclass(cls, m5.objects.BaseCPU) and \
58 not cls.abstract and \
59 not issubclass(cls, m5.objects.CheckerCPU)
66 def tester(cls):
67 return cpu_class is not None and cls is not None and \
68 issubclass(cls, cpu_class)
91 for name, cls in _cpu_classes.items():
96 doc = inspect.getdoc(cls)
130 for name, cls i
[all...]
H A DPlatformConfig.py64 def is_platform_class(cls):
70 return issubclass(cls, m5.objects.Platform) and \
71 not cls.abstract
90 for name, cls in _platform_classes.items():
95 doc = inspect.getdoc(cls)
110 for name, cls in inspect.getmembers(m5.objects, is_platform_class):
111 _platform_classes[name] = cls
H A DMemConfig.py52 def is_mem_class(cls):
58 return issubclass(cls, m5.objects.AbstractMemory) and \
59 not cls.abstract
78 for name, cls in _mem_classes.items():
83 doc = inspect.getdoc(cls)
93 for name, cls in inspect.getmembers(m5.objects, is_mem_class):
94 _mem_classes[name] = cls
96 def create_mem_ctrl(cls, r, i, nbr_mem_ctrls, intlv_bits, intlv_size):
115 ctrl = cls()
118 if issubclass(cls, m
[all...]
/gem5/src/cpu/simple/
H A DTimingSimpleCPU.py38 def memory_mode(cls):
42 def support_take_over(cls):
H A DNonCachingSimpleCPU.py54 def memory_mode(cls):
58 def support_take_over(cls):
H A DAtomicSimpleCPU.py54 def memory_mode(cls):
58 def support_take_over(cls):
/gem5/ext/testlib/
H A Dstate.py39 def name(cls, enum):
40 return cls.enums[enum]
62 def name(cls, enum):
63 return cls.enums[enum]
H A Duid.py53 def uid_to_path(cls, uid):
54 split_path = str(uid).split(cls.sep)[cls.path_idx]
55 return cls._full_path(split_path)
58 def uid_to_class(cls, uid):
59 return globals()[uid.split(cls.sep)[cls.type_idx]]
70 def from_uid(cls, uid):
71 args = uid.split(cls.sep)
72 del args[cls
[all...]
H A Dtest.py64 def __new__(cls, *args, **kwargs):
65 obj = super(TestCase, cls).__new__(cls, *args, **kwargs)
/gem5/src/sim/
H A DRoot.py39 def __new__(cls, **kwargs):
50 Root._the_instance = SimObject.__new__(cls)
54 def getInstance(cls):
/gem5/src/cpu/kvm/
H A DBaseKvmCPU.py56 def memory_mode(cls):
60 def require_caches(cls):
64 def support_take_over(cls):
/gem5/src/cpu/trace/
H A DTraceCPU.py51 def memory_mode(cls):
55 def require_caches(cls):
62 def support_take_over(cls):
/gem5/src/python/m5/
H A DSimObject.py457 cls = super(MetaSimObject, mcls).__new__(mcls, name, bases, cls_dict)
459 allClasses[name] = cls
460 return cls
463 def __init__(cls, name, bases, dict):
466 super(MetaSimObject, cls).__init__(name, bases, dict)
471 cls._params = multidict() # param descriptions
472 cls._ports = multidict() # port descriptions
475 cls._values = multidict() # param values
476 cls._hr_values = multidict() # human readable param values
477 cls
[all...]
H A Dparams.py94 cls = super(MetaParamValue, mcls).__new__(mcls, name, bases, dct)
96 allParams[name] = cls
97 return cls
110 def cxx_predecls(cls, code):
114 def pybind_predecls(cls, code):
115 cls.cxx_predecls(code)
130 def cxx_ini_predecls(cls, code):
136 def cxx_ini_parse(cls, code, src, dest, ret):
137 code('// Unhandled param type: %s' % cls.__name__)
554 def cxx_ini_predecls(cls, cod
[all...]
/gem5/configs/topologies/
H A DCluster.py47 def num_int_links(cls):
48 cls._num_int_links += 1
49 return cls._num_int_links - 1
51 def num_ext_links(cls):
52 cls._num_ext_links += 1
53 return cls._num_ext_links - 1
55 def num_routers(cls):
56 cls._num_routers += 1
57 return cls._num_routers - 1
/gem5/src/arch/generic/
H A Dmmapped_ipr.cc59 Addr cls(va >> IPR_CLASS_SHIFT);
61 switch (cls) {
76 Addr cls(va >> IPR_CLASS_SHIFT);
78 switch (cls) {
/gem5/ext/pybind11/tests/
H A Dtest_pickling.py12 cls = getattr(m, cls_name)
13 p = cls("test_value")
27 cls = getattr(m, cls_name)
28 p = cls("test_value")
H A Dtest_buffers.py83 for cls in [m.Buffer, m.ConstBuffer, m.DerivedBuffer]:
84 buf = cls()
/gem5/tests/gem5/
H A Dfixture.py92 def __new__(cls, target):
93 if target in cls.fixtures:
94 obj = cls.fixtures[target]
96 obj = super(UniqueFixture, cls).__new__(cls)
99 cls.fixtures[target] = obj
128 def __new__(cls, target):
129 obj = super(SConsFixture, cls).__new__(cls, target)
163 def __new__(cls, is
[all...]
/gem5/src/python/m5/util/
H A D__init__.py83 def __call__(cls, *args, **kwargs):
84 if hasattr(cls, '_instance'):
85 return cls._instance
87 cls._instance = super(Singleton, cls).__call__(*args, **kwargs)
88 return cls._instance
H A Dcode_formatter.py96 def __init__(cls, name, bases, dct):
97 super(code_formatter_meta, cls).__init__(name, bases, dct)
99 pat = cls.pattern
102 lb,rb = cls.braced
103 lb1,lb2,rb2,rb1 = cls.double_braced
105 'delim' : re.escape(cls.delim),
106 'ident' : cls.ident,
107 'pos' : cls.pos,
113 cls.pattern = re.compile(pat, re.VERBOSE | re.DOTALL | re.MULTILINE)
/gem5/src/cpu/testers/traffic_gen/
H A DBaseTrafficGen.py101 def memory_mode(cls):
105 def require_caches(cls):

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