Searched refs:L2XBar (Results 1 - 16 of 16) sorted by relevance

/gem5/tests/configs/
H A Dmemtest.py52 system.toL2Bus = L2XBar(clk_domain = system.cpu_clk_domain)
H A Dmemtest-filter.py52 system.toL2Bus = L2XBar(clk_domain = system.cpu_clk_domain,
H A Dbase_config.py114 system.toL2Bus = L2XBar(clk_domain=system.cpu_clk_domain)
/gem5/tests/gem5/memory/
H A Dmemtest-run.py53 system.toL2Bus = L2XBar(clk_domain = system.cpu_clk_domain)
/gem5/src/mem/
H A DXBar.py137 class L2XBar(CoherentXBar): class in inherits:CoherentXBar
/gem5/util/tlm/examples/
H A Dtlm_elastic_slave_with_l2.py110 system.tol2bus = L2XBar()
/gem5/configs/splash2/
H A Dcluster.py175 cluster.clusterbus = L2XBar(clock=busFrequency)
188 cluster.clusterbus = L2XBar(clock=busFrequency)
201 cluster.clusterbus = L2XBar(clock=busFrequency)
218 system.toL2bus = L2XBar(clock = busFrequency)
H A Drun.py203 system.toL2bus = L2XBar(clock = busFrequency)
/gem5/configs/learning_gem5/part1/
H A Dtwo_level.py107 system.l2bus = L2XBar()
/gem5/configs/example/
H A Dmemtest.py268 xbar = L2XBar()
293 xbar = L2XBar()
H A Dmemcheck.py260 xbar = L2XBar(width = 32)
286 xbar = L2XBar(width = 32)
/gem5/configs/dram/
H A Dlat_mem_rd.py284 system.l2cache.xbar = L2XBar()
291 system.l3cache.xbar = L2XBar()
/gem5/tests/gem5/cpu_tests/
H A Drun.py142 system.l1_to_l2 = L2XBar()
/gem5/src/cpu/
H A DBaseCPU.py56 from m5.objects.XBar import L2XBar
271 self.toL2Bus = xbar if xbar else L2XBar()
/gem5/configs/example/arm/
H A Ddevices.py155 self.toL2Bus = L2XBar(width=64, clk_domain=clk_domain)
282 self.toL3Bus = L2XBar(width=64)
/gem5/configs/common/
H A DCacheConfig.py105 system.tol2bus = L2XBar(clk_domain = system.cpu_clk_domain)

Completed in 22 milliseconds