/gem5/src/cpu/o3/ |
H A D | dyn_inst_impl.hh | 54 TheISA::PCState pc, TheISA::PCState predPC, 204 TheISA::PCState curPC = this->cpu->pcState(this->threadNumber); 206 TheISA::PCState newPC = this->cpu->pcState(this->threadNumber);
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H A D | cpu.cc | 79 using namespace TheISA; 114 vecMode(RenameMode<TheISA::ISA>::init(params->isa[0])), 212 assert(params->numPhysIntRegs >= numThreads * TheISA::NumIntRegs); 213 assert(params->numPhysFloatRegs >= numThreads * TheISA::NumFloatRegs); 214 assert(params->numPhysVecRegs >= numThreads * TheISA::NumVecRegs); 215 assert(params->numPhysVecPredRegs >= numThreads * TheISA::NumVecPredRegs); 216 assert(params->numPhysCCRegs >= numThreads * TheISA::NumCCRegs); 224 assert(RenameMode<TheISA::ISA>::equalsInit(isa[tid], isa[0])); 229 RegIndex invalidFPReg = TheISA::NumFloatRegs + 1; 231 (THE_ISA == ALPHA_ISA) ? TheISA [all...] |
H A D | regfile.hh | 67 using VecElem = TheISA::VecElem; 68 using VecRegContainer = TheISA::VecRegContainer; 71 using VecPredRegContainer = TheISA::VecPredRegContainer; 76 static constexpr auto NumVecElemPerVecReg = TheISA::NumVecElemPerVecReg;
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H A D | thread_context.hh | 89 TheISA::ISA * 95 TheISA::Decoder * 351 TheISA::PCState 358 void pcState(const TheISA::PCState &val) override; 360 void pcStateNoRecord(const TheISA::PCState &val) override;
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H A D | cpu.hh | 106 using VecElem = TheISA::VecElem; 107 using VecRegContainer = TheISA::VecRegContainer; 109 using VecPredRegContainer = TheISA::VecPredRegContainer; 483 void pcState(const TheISA::PCState &newPCState, ThreadID tid); 486 TheISA::PCState pcState(ThreadID tid); 605 std::vector<TheISA::ISA *> isa;
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/gem5/src/cpu/ |
H A D | exec_context.hh | 75 typedef TheISA::PCState PCState; 77 using VecRegContainer = TheISA::VecRegContainer; 78 using VecElem = TheISA::VecElem; 79 using VecPredRegContainer = TheISA::VecPredRegContainer;
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H A D | inst_pb_trace.cc | 124 TheISA::PCState pc, const StaticInstPtr mi) 135 InstPBTrace::traceInst(ThreadContext *tc, StaticInstPtr si, TheISA::PCState pc)
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H A D | profile.hh | 70 TheISA::StackTrace trace;
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H A D | base.hh | 219 TheISA::MicrocodeRom microcodeRom; 222 std::vector<TheISA::Interrupts*> interrupts; 225 TheISA::Interrupts * 279 static const Addr PCMask = ~((Addr)sizeof(TheISA::MachInst) - 1);
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H A D | base_dyn_inst_impl.hh | 64 TheISA::PCState _pc, TheISA::PCState _predPC,
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/gem5/src/dev/alpha/ |
H A D | tsunami_cchip.cc | 58 using namespace TheISA; 230 tsunami->intrctrl->post(number, TheISA::INTLEVEL_IRQ1, x); 239 tsunami->intrctrl->clear(number, TheISA::INTLEVEL_IRQ1, x); 323 tsunami->intrctrl->post(number, TheISA::INTLEVEL_IRQ1, x); 331 tsunami->intrctrl->clear(number, TheISA::INTLEVEL_IRQ1, x); 392 tsunami->intrctrl->clear(cpunum, TheISA::INTLEVEL_IRQ3, 0); 414 tsunami->intrctrl->clear(i, TheISA::INTLEVEL_IRQ2, 0); 438 tsunami->intrctrl->post(cpunum, TheISA::INTLEVEL_IRQ3, 0); 461 tsunami->intrctrl->post(i, TheISA::INTLEVEL_IRQ2, 0); 479 tsunami->intrctrl->post(i, TheISA [all...] |
/gem5/src/cpu/pred/ |
H A D | btb.cc | 111 TheISA::PCState 130 DefaultBTB::update(Addr instPC, const TheISA::PCState &target, ThreadID tid)
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H A D | bpred_unit.cc | 173 TheISA::PCState &pc, ThreadID tid) 181 TheISA::PCState target = pc; 224 TheISA::PCState rasTop = RAS[tid].top(); 225 target = TheISA::buildRetPC(pc, rasTop); 281 TheISA::advancePC(target, inst); 309 TheISA::advancePC(target, inst); 319 TheISA::advancePC(target, inst); 414 const TheISA::PCState &corrTarget,
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/gem5/src/cpu/minor/ |
H A D | fetch2.hh | 105 pc(TheISA::PCState(0)), 135 TheISA::PCState pc;
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H A D | decode.hh | 118 TheISA::PCState microopPC;
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H A D | fetch2.cc | 191 TheISA::PCState inst_pc = inst->pc; 315 TheISA::Decoder *decoder = thread->getDecoderPtr(); 379 TheISA::MachInst inst_word; 382 inst_word = TheISA::gtoh( 383 *(reinterpret_cast<TheISA::MachInst *> 459 TheISA::advancePC(fetch_info.pc, decoded_inst); 471 fetch_info.inputIndex += sizeof(TheISA::MachInst);
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/gem5/src/cpu/simple/ |
H A D | base.hh | 70 namespace TheISA namespace 106 TheISA::MachInst inst;
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H A D | atomic.cc | 65 using namespace TheISA; 140 TheISA::handleLockedSnoop(threadInfo[tid]->thread, 306 TheISA::handleLockedSnoop(t_info->thread, pkt, cacheBlockMask); 332 TheISA::handleLockedSnoop(t_info->thread, pkt, cacheBlockMask); 412 dcache_latency += TheISA::handleIprRead(thread->getTC(), &pkt); 421 TheISA::handleLockedRead(thread, req); 502 TheISA::handleLockedWrite(thread, req, 518 TheISA::handleIprWrite(thread->getTC(), &pkt); 613 dcache_latency += TheISA::handleIprRead(thread->getTC(), &pkt); 672 TheISA [all...] |
H A D | base.cc | 85 using namespace TheISA; 136 TheISA::initCPU(tc, tc->contextId()); 508 TheISA::PCState pcState = thread->pcState(); 518 TheISA::Decoder *decoder = &(thread->decoder); 587 TheISA::PCState pc = threadContexts[curThread]->pcState(); 590 bool usermode = TheISA::inUserMode(threadContexts[curThread]); 687 TheISA::PCState pcState = thread->pcState(); 688 TheISA::advancePC(pcState, curStaticInst);
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/gem5/src/sim/ |
H A D | syscall_emul.hh | 543 using namespace TheISA; 549 tgt->st_dev = TheISA::htog(tgt->st_dev); 551 tgt->st_ino = TheISA::htog(tgt->st_ino); 558 tgt->st_mode = TheISA::htog(tgt->st_mode); 560 tgt->st_nlink = TheISA::htog(tgt->st_nlink); 562 tgt->st_uid = TheISA::htog(tgt->st_uid); 564 tgt->st_gid = TheISA::htog(tgt->st_gid); 569 tgt->st_rdev = TheISA::htog(tgt->st_rdev); 571 tgt->st_size = TheISA::htog(tgt->st_size); 573 tgt->st_atimeX = TheISA [all...] |
/gem5/src/kern/linux/ |
H A D | events.cc | 82 uint64_t time = TheISA::getArgument(tc, arg_num, (uint16_t)-1, false);
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/gem5/src/arch/generic/ |
H A D | mmapped_ipr.cc | 52 pkt->set(ret, TheISA::GuestByteOrder);
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/gem5/src/gpu-compute/ |
H A D | fetch_unit.cc | 164 new TheISA::GpuTLB::TranslationState(BaseTLB::Execute, 191 new TheISA::GpuTLB::TranslationState(BaseTLB::Execute, 196 TheISA::GpuTLB::TranslationState *sender_state = 197 safe_cast<TheISA::GpuTLB::TranslationState*>(pkt->senderState);
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H A D | shader.cc | 82 length = roundUp(length, TheISA::PageBytes); 388 new TheISA::GpuTLB::TranslationState(mode, gpuTc, false); 401 TheISA::GpuTLB::TranslationState *sender_state = 402 safe_cast<TheISA::GpuTLB::TranslationState*>(pkt->senderState);
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/gem5/src/cpu/checker/ |
H A D | thread_context.hh | 58 namespace TheISA { namespace 127 TheISA::ISA *getIsaPtr() override { return actualTC->getIsaPtr(); } 129 TheISA::Decoder * 389 TheISA::PCState pcState() const override { return actualTC->pcState(); } 393 pcState(const TheISA::PCState &val) override 410 pcStateNoRecord(const TheISA::PCState &val) override
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