Searched defs:scr (Results 1 - 11 of 11) sorted by relevance

/gem5/src/arch/arm/
H A Dinterrupts.cc58 SCR scr; local
H A Dinterrupts.hh191 getISR(HCR hcr, CPSR cpsr, SCR scr) argument
H A Dutility.hh237 inSecureState(SCR scr, CPSR cpsr) argument
H A Dmiscregs.cc989 canReadCoprocReg(MiscRegIndex reg, SCR scr, CPSR cpsr) argument
1025 canWriteCoprocReg(MiscRegIndex reg, SCR scr, CPSR cpsr) argument
1063 SCR scr = tc->readMiscReg(MISCREG_SCR); local
1081 SCR scr = tc->readMiscReg(MISCREG_SCR); local
1118 canReadAArch64SysReg(MiscRegIndex reg, SCR scr, CPSR cpsr, ThreadContext *tc) argument
1156 canWriteAArch64SysReg(MiscRegIndex reg, SCR scr, CPSR cpsr, ThreadContext *tc) argument
[all...]
H A Dutility.cc198 SCR scr = inAArch64(tc) ? tc->readMiscReg(MISCREG_SCR_EL3) : local
207 SCR scr = tc->readMiscReg(MISCREG_SCR_EL3); local
329 SCR scr = tc->readMiscReg(MISCREG_SCR_EL3); local
474 const SCR scr = tc->readMiscReg(MISCREG_SCR); local
602 mcrMrc14TrapToHyp(const MiscRegIndex miscReg, HCR hcr, CPSR cpsr, SCR scr, argument
652 mcrrMrrc15TrapToHyp(const MiscRegIndex miscReg, CPSR cpsr, SCR scr, HSTR hstr, HCR hcr, uint32_t iss) argument
700 decodeMrsMsrBankedReg(uint8_t sysM, bool r, bool &isIntReg, int &regIdx, CPSR cpsr, SCR scr, NSACR nsacr, bool checkSecurity) argument
[all...]
H A Dtlb.hh415 SCR scr; member in class:ArmISA::TLB
H A Dfaults.cc499 SCR scr = tc->readMiscReg(MISCREG_SCR); local
518 SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR); local
798 SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR); local
870 SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR); local
1012 SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR_EL3); local
1180 SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR); local
1270 SCR scr = 0; local
1284 SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR); local
1331 SCR scr = 0; local
1345 SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR); local
1434 SCR scr = 0; local
1447 SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR); local
1460 SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR); local
1473 SCR scr = 0; local
1486 SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR); local
1499 SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR); local
1511 SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR); local
1534 SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR_EL3); local
1561 SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR_EL3); local
1571 SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR_EL3); local
[all...]
H A Dtable_walker.hh730 SCR scr; member in class:ArmISA::TableWalker::LongDescriptor::WalkerState
/gem5/src/arch/arm/insts/
H A Dmisc64.cc148 const SCR scr = tc->readMiscReg(MISCREG_SCR_EL3); local
H A Dstatic_inst.hh203 cpsrWriteByInstr(CPSR cpsr, uint32_t val, SCR scr, NSACR nsacr, argument
/gem5/src/dev/arm/
H A Dgic_v3_cpu_interface.cc2332 SCR scr = isa->readMiscRegNoEffect(MISCREG_SCR); local
2384 SCR scr = isa->readMiscRegNoEffect(MISCREG_SCR_EL3); local

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