| /gem5/src/arch/power/insts/ |
| H A D | floating.cc | 36 FloatOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
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| H A D | misc.cc | 36 MiscOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
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| H A D | mem.cc | 38 MemOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
44 MemDispOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
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| H A D | condition.cc | 36 CondLogicOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
49 CondMoveOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
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| H A D | static_inst.cc | 59 PowerStaticInst::generateDisassembly(Addr pc, argument
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| H A D | integer.cc | 37 IntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
84 IntImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
120 IntShiftOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
147 IntRotateOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
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| /gem5/src/dev/x86/ |
| H A D | south_bridge.cc | 44 Pc * pc = dynamic_cast<Pc *>(platform); local
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| /gem5/src/arch/x86/insts/ |
| H A D | microfpop.cc | 56 std::string FpOp::generateDisassembly(Addr pc, argument
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| H A D | micromediaop.cc | 39 std::string MediaOpReg::generateDisassembly(Addr pc, argument
53 std::string MediaOpImm::generateDisassembly(Addr pc, argument
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| H A D | microldstop.cc | 47 std::string LdStOp::generateDisassembly(Addr pc, argument
63 std::string LdStSplitOp::generateDisassembly(Addr pc, argument
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| /gem5/src/arch/arm/insts/ |
| H A D | data64.cc | 46 DataXImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
55 DataXImmOnlyOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
65 DataXSRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
74 DataXERegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
83 DataX1RegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
94 DataX1RegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
106 DataX1Reg2ImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
118 DataX2RegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
131 DataX2RegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
145 DataX3RegOp::generateDisassembly(Addr pc, cons argument
160 generateDisassembly( Addr pc, const SymbolTable *symtab) const argument
173 generateDisassembly( Addr pc, const SymbolTable *symtab) const argument
188 generateDisassembly( Addr pc, const SymbolTable *symtab) const argument
[all...] |
| H A D | branch.cc | 47 BranchReg::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
56 BranchImm::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
65 BranchRegReg::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
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| H A D | sve_mem.cc | 46 SveMemVecFillSpill::generateDisassembly(Addr pc, argument
62 SveMemPredFillSpill::generateDisassembly(Addr pc, argument
78 SveContigMemSS::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
97 SveContigMemSI::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
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| H A D | pred_inst.cc | 48 PredIntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
65 PredImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
79 DataImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
88 DataRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
97 DataRegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
106 PredMacroOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
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| H A D | branch64.cc | 73 generateDisassembly( Addr pc, const SymbolTable *symtab) const argument
83 generateDisassembly( Addr pc, const SymbolTable *symtab) const argument
93 generateDisassembly( Addr pc, const SymbolTable *symtab) const argument
103 generateDisassembly( Addr pc, const SymbolTable *symtab) const argument
114 generateDisassembly( Addr pc, const SymbolTable *symtab) const argument
123 generateDisassembly( Addr pc, const SymbolTable *symtab) const argument
135 generateDisassembly( Addr pc, const SymbolTable *symtab) const argument
[all...] |
| /gem5/src/arch/sparc/insts/ |
| H A D | micro.cc | 37 SparcMacroInst::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
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| H A D | priv.cc | 40 Priv::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
50 RdPriv::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
63 WrPriv::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
83 WrPrivImm::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
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| H A D | trap.cc | 38 Trap::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
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| H A D | blockmem.cc | 38 BlockMemMicro::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
63 BlockMemImmMicro::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
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| H A D | integer.cc | 44 IntOp::printPseudoOps(std::ostream &os, Addr pc, argument
58 IntOpImm::printPseudoOps(std::ostream &os, Addr pc, argument
83 IntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
98 IntOpImm::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
116 SetHi::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
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| /gem5/src/arch/riscv/insts/ |
| H A D | mem.cc | 48 Load::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
57 Store::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
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| H A D | compressed.cc | 44 CompRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
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| H A D | standard.cc | 47 RegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
57 CSROp::generateDisassembly(Addr pc, const SymbolTable *symtab) const argument
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| H A D | amo.cc | 47 string MemFenceMicro::generateDisassembly(Addr pc, argument
62 string LoadReserved::generateDisassembly(Addr pc, argument
71 string LoadReservedMicro::generateDisassembly(Addr pc, argument
81 string StoreCond::generateDisassembly(Addr pc, argument
91 string StoreCondMicro::generateDisassembly(Addr pc, argument
102 string AtomicMemOp::generateDisassembly(Addr pc, argument
112 string AtomicMemOpMicro::generateDisassembly(Addr pc, argument
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| /gem5/src/arch/sparc/ |
| H A D | nativetrace.cc | 71 SparcISA::PCState pc = tc->pcState(); local
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