110037SARM gem5 Developers/* 210037SARM gem5 Developers * Copyright (c) 2011-2013 ARM Limited 310037SARM gem5 Developers * All rights reserved 410037SARM gem5 Developers * 510037SARM gem5 Developers * The license below extends only to copyright in the software and shall 610037SARM gem5 Developers * not be construed as granting a license to any other intellectual 710037SARM gem5 Developers * property including but not limited to intellectual property relating 810037SARM gem5 Developers * to a hardware implementation of the functionality of the software 910037SARM gem5 Developers * licensed hereunder. You may use the software subject to the license 1010037SARM gem5 Developers * terms below provided that you ensure that this notice is replicated 1110037SARM gem5 Developers * unmodified and in its entirety in all distributions of the software, 1210037SARM gem5 Developers * modified or unmodified, in source code or in binary form. 1310037SARM gem5 Developers * 1410037SARM gem5 Developers * Redistribution and use in source and binary forms, with or without 1510037SARM gem5 Developers * modification, are permitted provided that the following conditions are 1610037SARM gem5 Developers * met: redistributions of source code must retain the above copyright 1710037SARM gem5 Developers * notice, this list of conditions and the following disclaimer; 1810037SARM gem5 Developers * redistributions in binary form must reproduce the above copyright 1910037SARM gem5 Developers * notice, this list of conditions and the following disclaimer in the 2010037SARM gem5 Developers * documentation and/or other materials provided with the distribution; 2110037SARM gem5 Developers * neither the name of the copyright holders nor the names of its 2210037SARM gem5 Developers * contributors may be used to endorse or promote products derived from 2310037SARM gem5 Developers * this software without specific prior written permission. 2410037SARM gem5 Developers * 2510037SARM gem5 Developers * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2610037SARM gem5 Developers * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2710037SARM gem5 Developers * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2810037SARM gem5 Developers * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2910037SARM gem5 Developers * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3010037SARM gem5 Developers * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3110037SARM gem5 Developers * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3210037SARM gem5 Developers * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3310037SARM gem5 Developers * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3410037SARM gem5 Developers * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3510037SARM gem5 Developers * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3610037SARM gem5 Developers * 3710037SARM gem5 Developers * Authors: Gabe Black 3810037SARM gem5 Developers */ 3910037SARM gem5 Developers 4010037SARM gem5 Developers#include "arch/arm/insts/branch64.hh" 4110037SARM gem5 Developers 4210037SARM gem5 Developersnamespace ArmISA 4310037SARM gem5 Developers{ 4410037SARM gem5 Developers 4510037SARM gem5 DevelopersArmISA::PCState 4610037SARM gem5 DevelopersBranchImm64::branchTarget(const ArmISA::PCState &branchPC) const 4710037SARM gem5 Developers{ 4810037SARM gem5 Developers ArmISA::PCState pcs = branchPC; 4910037SARM gem5 Developers pcs.instNPC(pcs.pc() + imm); 5010037SARM gem5 Developers pcs.advance(); 5110037SARM gem5 Developers return pcs; 5210037SARM gem5 Developers} 5310037SARM gem5 Developers 5410037SARM gem5 DevelopersArmISA::PCState 5510037SARM gem5 DevelopersBranchImmReg64::branchTarget(const ArmISA::PCState &branchPC) const 5610037SARM gem5 Developers{ 5710037SARM gem5 Developers ArmISA::PCState pcs = branchPC; 5810037SARM gem5 Developers pcs.instNPC(pcs.pc() + imm); 5910037SARM gem5 Developers pcs.advance(); 6010037SARM gem5 Developers return pcs; 6110037SARM gem5 Developers} 6210037SARM gem5 Developers 6310037SARM gem5 DevelopersArmISA::PCState 6410037SARM gem5 DevelopersBranchImmImmReg64::branchTarget(const ArmISA::PCState &branchPC) const 6510037SARM gem5 Developers{ 6610037SARM gem5 Developers ArmISA::PCState pcs = branchPC; 6710037SARM gem5 Developers pcs.instNPC(pcs.pc() + imm2); 6810037SARM gem5 Developers pcs.advance(); 6910037SARM gem5 Developers return pcs; 7010037SARM gem5 Developers} 7110037SARM gem5 Developers 7210037SARM gem5 Developersstd::string 7310037SARM gem5 DevelopersBranchImmCond64::generateDisassembly( 7410037SARM gem5 Developers Addr pc, const SymbolTable *symtab) const 7510037SARM gem5 Developers{ 7610037SARM gem5 Developers std::stringstream ss; 7710037SARM gem5 Developers printMnemonic(ss, "", false, true, condCode); 7810037SARM gem5 Developers printTarget(ss, pc + imm, symtab); 7910037SARM gem5 Developers return ss.str(); 8010037SARM gem5 Developers} 8110037SARM gem5 Developers 8210037SARM gem5 Developersstd::string 8310037SARM gem5 DevelopersBranchImm64::generateDisassembly( 8410037SARM gem5 Developers Addr pc, const SymbolTable *symtab) const 8510037SARM gem5 Developers{ 8610037SARM gem5 Developers std::stringstream ss; 8710037SARM gem5 Developers printMnemonic(ss, "", false); 8810037SARM gem5 Developers printTarget(ss, pc + imm, symtab); 8910037SARM gem5 Developers return ss.str(); 9010037SARM gem5 Developers} 9110037SARM gem5 Developers 9210037SARM gem5 Developersstd::string 9310037SARM gem5 DevelopersBranchReg64::generateDisassembly( 9410037SARM gem5 Developers Addr pc, const SymbolTable *symtab) const 9510037SARM gem5 Developers{ 9610037SARM gem5 Developers std::stringstream ss; 9710037SARM gem5 Developers printMnemonic(ss, "", false); 9812104Snathanael.premillieu@arm.com printIntReg(ss, op1); 9910037SARM gem5 Developers return ss.str(); 10010037SARM gem5 Developers} 10110037SARM gem5 Developers 10210037SARM gem5 Developersstd::string 10310037SARM gem5 DevelopersBranchRet64::generateDisassembly( 10410037SARM gem5 Developers Addr pc, const SymbolTable *symtab) const 10510037SARM gem5 Developers{ 10610037SARM gem5 Developers std::stringstream ss; 10710037SARM gem5 Developers printMnemonic(ss, "", false); 10810037SARM gem5 Developers if (op1 != INTREG_X30) 10912104Snathanael.premillieu@arm.com printIntReg(ss, op1); 11010037SARM gem5 Developers return ss.str(); 11110037SARM gem5 Developers} 11210037SARM gem5 Developers 11310037SARM gem5 Developersstd::string 11410037SARM gem5 DevelopersBranchEret64::generateDisassembly( 11510037SARM gem5 Developers Addr pc, const SymbolTable *symtab) const 11610037SARM gem5 Developers{ 11710037SARM gem5 Developers std::stringstream ss; 11810037SARM gem5 Developers printMnemonic(ss, "", false); 11910037SARM gem5 Developers return ss.str(); 12010037SARM gem5 Developers} 12110037SARM gem5 Developers 12210037SARM gem5 Developersstd::string 12310037SARM gem5 DevelopersBranchImmReg64::generateDisassembly( 12410037SARM gem5 Developers Addr pc, const SymbolTable *symtab) const 12510037SARM gem5 Developers{ 12610037SARM gem5 Developers std::stringstream ss; 12710037SARM gem5 Developers printMnemonic(ss, "", false); 12812104Snathanael.premillieu@arm.com printIntReg(ss, op1); 12910037SARM gem5 Developers ccprintf(ss, ", "); 13010037SARM gem5 Developers printTarget(ss, pc + imm, symtab); 13110037SARM gem5 Developers return ss.str(); 13210037SARM gem5 Developers} 13310037SARM gem5 Developers 13410037SARM gem5 Developersstd::string 13510037SARM gem5 DevelopersBranchImmImmReg64::generateDisassembly( 13610037SARM gem5 Developers Addr pc, const SymbolTable *symtab) const 13710037SARM gem5 Developers{ 13810037SARM gem5 Developers std::stringstream ss; 13910037SARM gem5 Developers printMnemonic(ss, "", false); 14012104Snathanael.premillieu@arm.com printIntReg(ss, op1); 14110037SARM gem5 Developers ccprintf(ss, ", #%#x, ", imm1); 14210037SARM gem5 Developers printTarget(ss, pc + imm2, symtab); 14310037SARM gem5 Developers return ss.str(); 14410037SARM gem5 Developers} 14510037SARM gem5 Developers 14610037SARM gem5 Developers} // namespace ArmISA 147