| /gem5/src/arch/mips/ |
| H A D | mt_constants.hh | 95 Bitfield<7, 0> asid; member in namespace:MipsISA
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| H A D | pagetable.hh | 52 uint8_t asid; member in struct:MipsISA::PTE
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| H A D | dt_constants.hh | 84 Bitfield<12, 5> asid; member in namespace:MipsISA
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| H A D | faults.hh | 228 Addr asid; member in class:MipsISA::TlbFault
276 TlbRefillFault(Addr asid, Addr vaddr, Addr vpn, bool store) : argument
291 TlbInvalidFault(Addr asid, Addr vaddr, Addr vpn, bool store) : argument
299 TlbModifiedFault(Addr asid, Addr vaddr, Addr vpn) : argument
[all...] |
| H A D | pra_constants.hh | 101 Bitfield<7, 0> asid; member in namespace:MipsISA
287 Bitfield<23, 16> asid; member in namespace:MipsISA
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| /gem5/src/arch/power/ |
| H A D | pagetable.hh | 120 uint8_t asid; member in struct:PowerISA::PTE
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| /gem5/src/arch/riscv/ |
| H A D | pagetable.hh | 52 uint8_t asid; member in struct:RiscvISA::PTE
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| H A D | pra_constants.hh | 101 Bitfield<7, 0> asid; member in namespace:RiscvISA
287 Bitfield<23, 16> asid; member in namespace:RiscvISA
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| /gem5/src/arch/arm/ |
| H A D | tlbi_op.hh | 133 uint16_t asid; member in class:ArmISA::TLBIASID
149 uint16_t asid; member in class:ArmISA::ITLBIASID
165 uint16_t asid; member in class:ArmISA::DTLBIASID
207 uint16_t asid; member in class:ArmISA::TLBIMVA
225 uint16_t asid; member in class:ArmISA::ITLBIMVA
243 uint16_t asid; member in class:ArmISA::DTLBIMVA
[all...] |
| H A D | pagetable.hh | 113 uint16_t asid; // Address Space Identifier member in struct:ArmISA::TlbEntry
301 SERIALIZE_SCALAR(asid); variable
331 UNSERIALIZE_SCALAR(asid); variable
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| H A D | tlb.hh | 420 uint16_t asid; member in class:ArmISA::TLB
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| H A D | table_walker.hh | 710 uint16_t asid; member in class:ArmISA::TableWalker::LongDescriptor::WalkerState
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| H A D | miscregs_types.hh | 587 Bitfield<7,0> asid; member in namespace:ArmISA
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| /gem5/src/dev/arm/ |
| H A D | smmu_v3_transl.hh | 72 uint16_t asid; member in struct:SMMUTranslationProcess::TranslContext
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| H A D | smmu_v3_caches.cc | 289 SMMUTLB::invalidateVA(Addr va, uint16_t asid, uint16_t vmid) argument
318 SMMUTLB::invalidateASID(uint16_t asid, uint16_t vmid) argument
459 ARMArchTLB::lookup(Addr va, uint16_t asid, uint16_t vmid, bool updStats) argument
513 invalidateVA(Addr va, uint16_t asid, uint16_t vmid) argument
544 invalidateASID(uint16_t asid, uint16_t vmid) argument
585 pickSetIdx(Addr va, uint16_t asid, uint16_t vmid) const argument
1014 lookup(Addr va, Addr vaMask, uint16_t asid, uint16_t vmid, unsigned stage, unsigned level, bool updStats) argument
1086 invalidateVA(Addr va, uint16_t asid, uint16_t vmid, const bool leaf_only) argument
1123 invalidateASID(uint16_t asid, uint16_t vmid) argument
[all...] |
| H A D | smmu_v3_caches.hh | 114 uint16_t asid; member in struct:SMMUTLB::Entry
163 uint16_t asid; member in struct:ARMArchTLB::Entry
254 uint16_t asid; member in struct:ConfigCache::Entry
294 uint16_t asid; member in struct:WalkCache::Entry
[all...] |
| H A D | smmu_v3_transl.cc | 647 walkCacheLookup( Yield &yield, const WalkCache::Entry *&walkEntry, Addr addr, uint16_t asid, uint16_t vmid, unsigned stage, unsigned level) argument
[all...] |
| H A D | smmu_v3_defs.hh | 283 Bitfield<63, 48> asid; member in struct:ContextDescriptor
358 Bitfield<63, 48> asid; member in struct:SMMUCommand
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| /gem5/src/cpu/o3/probe/ |
| H A D | elastic_trace.hh | 297 uint32_t asid; member in struct:ElasticTrace::TraceInfo
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| /gem5/src/cpu/trace/ |
| H A D | trace_cpu.hh | 610 uint32_t asid; member in class:TraceCPU::ElasticDataGen::GraphNode
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| /gem5/src/cpu/o3/ |
| H A D | lsq.hh | 460 setVirt(int asid, Addr vaddr, unsigned size, Request::Flags flags_, argument
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| /gem5/src/mem/ |
| H A D | request.hh | 459 Request(uint64_t asid, Addr vaddr, unsigned size, Flags flags, argument
471 Request(uint64_t asid, Addr vaddr, unsigned size, Flags flags, argument
529 setVirt(uint64_t asid, Addr vaddr, unsigned size, Flags flags, argument
744 setAsid(uint64_t asid) argument
[all...] |
| /gem5/src/cpu/ |
| H A D | base_dyn_inst.hh | 221 short asid; member in class:BaseDynInst
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