15222Sksewell@umich.edu/* 25268Sksewell@umich.edu * Copyright (c) 2002-2005 The Regents of The University of Michigan 35254Sksewell@umich.edu * Copyright (c) 2007 MIPS Technologies, Inc. 45254Sksewell@umich.edu * All rights reserved. 55222Sksewell@umich.edu * 65254Sksewell@umich.edu * Redistribution and use in source and binary forms, with or without 75254Sksewell@umich.edu * modification, are permitted provided that the following conditions are 85254Sksewell@umich.edu * met: redistributions of source code must retain the above copyright 95254Sksewell@umich.edu * notice, this list of conditions and the following disclaimer; 105254Sksewell@umich.edu * redistributions in binary form must reproduce the above copyright 115254Sksewell@umich.edu * notice, this list of conditions and the following disclaimer in the 125254Sksewell@umich.edu * documentation and/or other materials provided with the distribution; 135254Sksewell@umich.edu * neither the name of the copyright holders nor the names of its 145254Sksewell@umich.edu * contributors may be used to endorse or promote products derived from 155254Sksewell@umich.edu * this software without specific prior written permission. 165222Sksewell@umich.edu * 175254Sksewell@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 185254Sksewell@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 195254Sksewell@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 205254Sksewell@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 215254Sksewell@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 225254Sksewell@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 235254Sksewell@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 245254Sksewell@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 255254Sksewell@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 265254Sksewell@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 275254Sksewell@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 285222Sksewell@umich.edu * 295268Sksewell@umich.edu * Authors: Nathan Binkert 305268Sksewell@umich.edu * Steve Reinhardt 315268Sksewell@umich.edu * Jaidev Patwardhan 325222Sksewell@umich.edu */ 335222Sksewell@umich.edu 345222Sksewell@umich.edu#ifndef __ARCH_MIPS_PAGETABLE_H__ 355222Sksewell@umich.edu#define __ARCH_MIPS_PAGETABLE_H__ 365222Sksewell@umich.edu 3712334Sgabeblack@google.com#include "base/logging.hh" 388763Sgblack@eecs.umich.edu#include "base/types.hh" 398763Sgblack@eecs.umich.edu#include "sim/serialize.hh" 405222Sksewell@umich.edu 415222Sksewell@umich.edunamespace MipsISA { 425222Sksewell@umich.edu 436378Sgblack@eecs.umich.edustruct VAddr 446378Sgblack@eecs.umich.edu{ 456378Sgblack@eecs.umich.edu}; 465222Sksewell@umich.edu 476378Sgblack@eecs.umich.edu// ITB/DTB page table entry 486378Sgblack@eecs.umich.edustruct PTE 496378Sgblack@eecs.umich.edu{ 506378Sgblack@eecs.umich.edu Addr Mask; 516378Sgblack@eecs.umich.edu Addr VPN; 526378Sgblack@eecs.umich.edu uint8_t asid; 535222Sksewell@umich.edu 546378Sgblack@eecs.umich.edu bool G; 555222Sksewell@umich.edu 566378Sgblack@eecs.umich.edu /* Contents of Entry Lo0 */ 576378Sgblack@eecs.umich.edu Addr PFN0; // Physical Frame Number - Even 586378Sgblack@eecs.umich.edu bool D0; // Even entry Dirty Bit 596378Sgblack@eecs.umich.edu bool V0; // Even entry Valid Bit 606378Sgblack@eecs.umich.edu uint8_t C0; // Cache Coherency Bits - Even 615222Sksewell@umich.edu 626378Sgblack@eecs.umich.edu /* Contents of Entry Lo1 */ 636378Sgblack@eecs.umich.edu Addr PFN1; // Physical Frame Number - Odd 646378Sgblack@eecs.umich.edu bool D1; // Odd entry Dirty Bit 656378Sgblack@eecs.umich.edu bool V1; // Odd entry Valid Bit 666378Sgblack@eecs.umich.edu uint8_t C1; // Cache Coherency Bits (3 bits) 675222Sksewell@umich.edu 6811320Ssteve.reinhardt@amd.com /* 696378Sgblack@eecs.umich.edu * The next few variables are put in as optimizations to reduce 706378Sgblack@eecs.umich.edu * TLB lookup overheads. For a given Mask, what is the address shift 716378Sgblack@eecs.umich.edu * amount, and what is the OffsetMask 726378Sgblack@eecs.umich.edu */ 736378Sgblack@eecs.umich.edu int AddrShiftAmount; 746378Sgblack@eecs.umich.edu int OffsetMask; 755222Sksewell@umich.edu 766378Sgblack@eecs.umich.edu bool Valid() { return (V0 | V1); }; 7710905Sandreas.sandberg@arm.com void serialize(CheckpointOut &cp) const; 7810905Sandreas.sandberg@arm.com void unserialize(CheckpointIn &cp); 796378Sgblack@eecs.umich.edu}; 805222Sksewell@umich.edu 818763Sgblack@eecs.umich.edu// WARN: This particular TLB entry is not necessarily conformed to MIPS ISA 828763Sgblack@eecs.umich.edustruct TlbEntry 838763Sgblack@eecs.umich.edu{ 848763Sgblack@eecs.umich.edu Addr _pageStart; 858763Sgblack@eecs.umich.edu TlbEntry() {} 8610558Salexandru.dutu@amd.com TlbEntry(Addr asn, Addr vaddr, Addr paddr, 8710558Salexandru.dutu@amd.com bool uncacheable, bool read_only) 8810558Salexandru.dutu@amd.com : _pageStart(paddr) 8910558Salexandru.dutu@amd.com { 9010558Salexandru.dutu@amd.com if (uncacheable || read_only) 9110558Salexandru.dutu@amd.com warn("MIPS TlbEntry does not support uncacheable" 9210558Salexandru.dutu@amd.com " or read-only mappings\n"); 9310558Salexandru.dutu@amd.com } 948763Sgblack@eecs.umich.edu 958763Sgblack@eecs.umich.edu Addr pageStart() 968763Sgblack@eecs.umich.edu { 978763Sgblack@eecs.umich.edu return _pageStart; 988763Sgblack@eecs.umich.edu } 998763Sgblack@eecs.umich.edu 1008763Sgblack@eecs.umich.edu void 1018763Sgblack@eecs.umich.edu updateVaddr(Addr new_vaddr) {} 1028763Sgblack@eecs.umich.edu 10310905Sandreas.sandberg@arm.com void serialize(CheckpointOut &cp) const 1048763Sgblack@eecs.umich.edu { 1058763Sgblack@eecs.umich.edu SERIALIZE_SCALAR(_pageStart); 1068763Sgblack@eecs.umich.edu } 1078763Sgblack@eecs.umich.edu 10810905Sandreas.sandberg@arm.com void unserialize(CheckpointIn &cp) 1098763Sgblack@eecs.umich.edu { 1108763Sgblack@eecs.umich.edu UNSERIALIZE_SCALAR(_pageStart); 1118763Sgblack@eecs.umich.edu } 1128763Sgblack@eecs.umich.edu 1138763Sgblack@eecs.umich.edu}; 1148763Sgblack@eecs.umich.edu 1155222Sksewell@umich.edu}; 1165222Sksewell@umich.edu#endif // __ARCH_MIPS_PAGETABLE_H__ 1175222Sksewell@umich.edu 118