113115Sgiacomo.travaglini@arm.com/* 214128Sgiacomo.travaglini@arm.com * Copyright (c) 2010-2019 ARM Limited 313115Sgiacomo.travaglini@arm.com * All rights reserved 413115Sgiacomo.travaglini@arm.com * 513115Sgiacomo.travaglini@arm.com * The license below extends only to copyright in the software and shall 613115Sgiacomo.travaglini@arm.com * not be construed as granting a license to any other intellectual 713115Sgiacomo.travaglini@arm.com * property including but not limited to intellectual property relating 813115Sgiacomo.travaglini@arm.com * to a hardware implementation of the functionality of the software 913115Sgiacomo.travaglini@arm.com * licensed hereunder. You may use the software subject to the license 1013115Sgiacomo.travaglini@arm.com * terms below provided that you ensure that this notice is replicated 1113115Sgiacomo.travaglini@arm.com * unmodified and in its entirety in all distributions of the software, 1213115Sgiacomo.travaglini@arm.com * modified or unmodified, in source code or in binary form. 1313115Sgiacomo.travaglini@arm.com * 1413115Sgiacomo.travaglini@arm.com * Copyright (c) 2009 The Regents of The University of Michigan 1513115Sgiacomo.travaglini@arm.com * All rights reserved. 1613115Sgiacomo.travaglini@arm.com * 1713115Sgiacomo.travaglini@arm.com * Redistribution and use in source and binary forms, with or without 1813115Sgiacomo.travaglini@arm.com * modification, are permitted provided that the following conditions are 1913115Sgiacomo.travaglini@arm.com * met: redistributions of source code must retain the above copyright 2013115Sgiacomo.travaglini@arm.com * notice, this list of conditions and the following disclaimer; 2113115Sgiacomo.travaglini@arm.com * redistributions in binary form must reproduce the above copyright 2213115Sgiacomo.travaglini@arm.com * notice, this list of conditions and the following disclaimer in the 2313115Sgiacomo.travaglini@arm.com * documentation and/or other materials provided with the distribution; 2413115Sgiacomo.travaglini@arm.com * neither the name of the copyright holders nor the names of its 2513115Sgiacomo.travaglini@arm.com * contributors may be used to endorse or promote products derived from 2613115Sgiacomo.travaglini@arm.com * this software without specific prior written permission. 2713115Sgiacomo.travaglini@arm.com * 2813115Sgiacomo.travaglini@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2913115Sgiacomo.travaglini@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 3013115Sgiacomo.travaglini@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 3113115Sgiacomo.travaglini@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 3213115Sgiacomo.travaglini@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3313115Sgiacomo.travaglini@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3413115Sgiacomo.travaglini@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3513115Sgiacomo.travaglini@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3613115Sgiacomo.travaglini@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3713115Sgiacomo.travaglini@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3813115Sgiacomo.travaglini@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3913115Sgiacomo.travaglini@arm.com * 4013115Sgiacomo.travaglini@arm.com * Authors: Gabe Black 4113115Sgiacomo.travaglini@arm.com * Giacomo Gabrielli 4213115Sgiacomo.travaglini@arm.com */ 4313115Sgiacomo.travaglini@arm.com 4413115Sgiacomo.travaglini@arm.com#ifndef __ARCH_ARM_MISCREGS_TYPES_HH__ 4513115Sgiacomo.travaglini@arm.com#define __ARCH_ARM_MISCREGS_TYPES_HH__ 4613115Sgiacomo.travaglini@arm.com 4713115Sgiacomo.travaglini@arm.com#include "base/bitunion.hh" 4813115Sgiacomo.travaglini@arm.com 4913115Sgiacomo.travaglini@arm.comnamespace ArmISA 5013115Sgiacomo.travaglini@arm.com{ 5113115Sgiacomo.travaglini@arm.com BitUnion32(CPSR) 5213115Sgiacomo.travaglini@arm.com Bitfield<31, 30> nz; 5313115Sgiacomo.travaglini@arm.com Bitfield<29> c; 5413115Sgiacomo.travaglini@arm.com Bitfield<28> v; 5513115Sgiacomo.travaglini@arm.com Bitfield<27> q; 5613115Sgiacomo.travaglini@arm.com Bitfield<26, 25> it1; 5713115Sgiacomo.travaglini@arm.com Bitfield<24> j; 5814128Sgiacomo.travaglini@arm.com Bitfield<22> pan; 5913115Sgiacomo.travaglini@arm.com Bitfield<21> ss; // AArch64 6013115Sgiacomo.travaglini@arm.com Bitfield<20> il; // AArch64 6113115Sgiacomo.travaglini@arm.com Bitfield<19, 16> ge; 6213115Sgiacomo.travaglini@arm.com Bitfield<15, 10> it2; 6313115Sgiacomo.travaglini@arm.com Bitfield<9> d; // AArch64 6413115Sgiacomo.travaglini@arm.com Bitfield<9> e; 6513115Sgiacomo.travaglini@arm.com Bitfield<8> a; 6613115Sgiacomo.travaglini@arm.com Bitfield<7> i; 6713115Sgiacomo.travaglini@arm.com Bitfield<6> f; 6813115Sgiacomo.travaglini@arm.com Bitfield<8, 6> aif; 6913115Sgiacomo.travaglini@arm.com Bitfield<9, 6> daif; // AArch64 7013115Sgiacomo.travaglini@arm.com Bitfield<5> t; 7113115Sgiacomo.travaglini@arm.com Bitfield<4> width; // AArch64 7213115Sgiacomo.travaglini@arm.com Bitfield<3, 2> el; // AArch64 7313115Sgiacomo.travaglini@arm.com Bitfield<4, 0> mode; 7413115Sgiacomo.travaglini@arm.com Bitfield<0> sp; // AArch64 7513115Sgiacomo.travaglini@arm.com EndBitUnion(CPSR) 7613115Sgiacomo.travaglini@arm.com 7713117Sgiacomo.travaglini@arm.com BitUnion64(AA64DFR0) 7813117Sgiacomo.travaglini@arm.com Bitfield<43, 40> tracefilt; 7913117Sgiacomo.travaglini@arm.com Bitfield<39, 36> doublelock; 8013117Sgiacomo.travaglini@arm.com Bitfield<35, 32> pmsver; 8113117Sgiacomo.travaglini@arm.com Bitfield<31, 28> ctx_cmps; 8213117Sgiacomo.travaglini@arm.com Bitfield<23, 20> wrps; 8313117Sgiacomo.travaglini@arm.com Bitfield<15, 12> brps; 8413117Sgiacomo.travaglini@arm.com Bitfield<11, 8> pmuver; 8513117Sgiacomo.travaglini@arm.com Bitfield<7, 4> tracever; 8613117Sgiacomo.travaglini@arm.com Bitfield<3, 0> debugver; 8713117Sgiacomo.travaglini@arm.com EndBitUnion(AA64DFR0) 8813117Sgiacomo.travaglini@arm.com 8913117Sgiacomo.travaglini@arm.com BitUnion64(AA64ISAR0) 9013117Sgiacomo.travaglini@arm.com Bitfield<63, 60> rndr; 9113117Sgiacomo.travaglini@arm.com Bitfield<59, 56> tlb; 9213117Sgiacomo.travaglini@arm.com Bitfield<55, 52> ts; 9313117Sgiacomo.travaglini@arm.com Bitfield<51, 48> fhm; 9413117Sgiacomo.travaglini@arm.com Bitfield<47, 44> dp; 9513117Sgiacomo.travaglini@arm.com Bitfield<43, 40> sm4; 9613117Sgiacomo.travaglini@arm.com Bitfield<39, 36> sm3; 9713117Sgiacomo.travaglini@arm.com Bitfield<35, 32> sha3; 9813117Sgiacomo.travaglini@arm.com Bitfield<31, 28> rdm; 9913117Sgiacomo.travaglini@arm.com Bitfield<23, 20> atomic; 10013117Sgiacomo.travaglini@arm.com Bitfield<19, 16> crc32; 10113117Sgiacomo.travaglini@arm.com Bitfield<15, 12> sha2; 10213117Sgiacomo.travaglini@arm.com Bitfield<11, 8> sha1; 10313117Sgiacomo.travaglini@arm.com Bitfield<3, 0> aes; 10413117Sgiacomo.travaglini@arm.com EndBitUnion(AA64ISAR0) 10513117Sgiacomo.travaglini@arm.com 10613117Sgiacomo.travaglini@arm.com BitUnion64(AA64ISAR1) 10713117Sgiacomo.travaglini@arm.com Bitfield<43, 40> specres; 10813117Sgiacomo.travaglini@arm.com Bitfield<39, 36> sb; 10913117Sgiacomo.travaglini@arm.com Bitfield<35, 32> frintts; 11013117Sgiacomo.travaglini@arm.com Bitfield<31, 28> gpi; 11113117Sgiacomo.travaglini@arm.com Bitfield<27, 24> gpa; 11213117Sgiacomo.travaglini@arm.com Bitfield<23, 20> lrcpc; 11313117Sgiacomo.travaglini@arm.com Bitfield<19, 16> fcma; 11413117Sgiacomo.travaglini@arm.com Bitfield<15, 12> jscvt; 11513117Sgiacomo.travaglini@arm.com Bitfield<11, 8> api; 11613117Sgiacomo.travaglini@arm.com Bitfield<7, 4> apa; 11713117Sgiacomo.travaglini@arm.com Bitfield<3, 0> dpb; 11813117Sgiacomo.travaglini@arm.com EndBitUnion(AA64ISAR1) 11913117Sgiacomo.travaglini@arm.com 12013117Sgiacomo.travaglini@arm.com BitUnion64(AA64MMFR0) 12113117Sgiacomo.travaglini@arm.com Bitfield<47, 44> exs; 12213117Sgiacomo.travaglini@arm.com Bitfield<43, 40> tgran4_2; 12313117Sgiacomo.travaglini@arm.com Bitfield<39, 36> tgran64_2; 12413117Sgiacomo.travaglini@arm.com Bitfield<35, 32> tgran16_2; 12513117Sgiacomo.travaglini@arm.com Bitfield<31, 28> tgran4; 12613117Sgiacomo.travaglini@arm.com Bitfield<27, 24> tgran64; 12713117Sgiacomo.travaglini@arm.com Bitfield<23, 20> tgran16; 12813117Sgiacomo.travaglini@arm.com Bitfield<19, 16> bigendEL0; 12913117Sgiacomo.travaglini@arm.com Bitfield<15, 12> snsmem; 13013117Sgiacomo.travaglini@arm.com Bitfield<11, 8> bigend; 13113117Sgiacomo.travaglini@arm.com Bitfield<7, 4> asidbits; 13213117Sgiacomo.travaglini@arm.com Bitfield<3, 0> parange; 13313117Sgiacomo.travaglini@arm.com EndBitUnion(AA64MMFR0) 13413117Sgiacomo.travaglini@arm.com 13513117Sgiacomo.travaglini@arm.com BitUnion64(AA64MMFR1) 13613117Sgiacomo.travaglini@arm.com Bitfield<31, 28> xnx; 13713117Sgiacomo.travaglini@arm.com Bitfield<27, 24> specsei; 13813117Sgiacomo.travaglini@arm.com Bitfield<23, 20> pan; 13913117Sgiacomo.travaglini@arm.com Bitfield<19, 16> lo; 14013117Sgiacomo.travaglini@arm.com Bitfield<15, 12> hpds; 14113117Sgiacomo.travaglini@arm.com Bitfield<11, 8> vh; 14213117Sgiacomo.travaglini@arm.com Bitfield<7, 4> vmidbits; 14313117Sgiacomo.travaglini@arm.com Bitfield<3, 0> hafdbs; 14413117Sgiacomo.travaglini@arm.com EndBitUnion(AA64MMFR1) 14513117Sgiacomo.travaglini@arm.com 14613117Sgiacomo.travaglini@arm.com BitUnion64(AA64MMFR2) 14713117Sgiacomo.travaglini@arm.com Bitfield<63, 60> e0pd; 14813117Sgiacomo.travaglini@arm.com Bitfield<59, 56> evt; 14913117Sgiacomo.travaglini@arm.com Bitfield<55, 52> bbm; 15013117Sgiacomo.travaglini@arm.com Bitfield<51, 48> ttl; 15113117Sgiacomo.travaglini@arm.com Bitfield<43, 40> fwb; 15213117Sgiacomo.travaglini@arm.com Bitfield<39, 36> ids; 15313117Sgiacomo.travaglini@arm.com Bitfield<35, 32> at; 15413117Sgiacomo.travaglini@arm.com Bitfield<31, 28> st; 15513117Sgiacomo.travaglini@arm.com Bitfield<27, 24> nv; 15613117Sgiacomo.travaglini@arm.com Bitfield<23, 20> ccidx; 15713117Sgiacomo.travaglini@arm.com Bitfield<19, 16> varange; 15813117Sgiacomo.travaglini@arm.com Bitfield<15, 12> iesb; 15913117Sgiacomo.travaglini@arm.com Bitfield<11, 8> lsm; 16013117Sgiacomo.travaglini@arm.com Bitfield<7, 4> uao; 16113117Sgiacomo.travaglini@arm.com Bitfield<3, 0> cnp; 16213117Sgiacomo.travaglini@arm.com EndBitUnion(AA64MMFR2) 16313117Sgiacomo.travaglini@arm.com 16413117Sgiacomo.travaglini@arm.com BitUnion64(AA64PFR0) 16513117Sgiacomo.travaglini@arm.com Bitfield<63, 60> csv3; 16613117Sgiacomo.travaglini@arm.com Bitfield<59, 56> csv2; 16713117Sgiacomo.travaglini@arm.com Bitfield<51, 48> dit; 16813117Sgiacomo.travaglini@arm.com Bitfield<47, 44> amu; 16913117Sgiacomo.travaglini@arm.com Bitfield<43, 40> mpam; 17013117Sgiacomo.travaglini@arm.com Bitfield<39, 36> sel2; 17113117Sgiacomo.travaglini@arm.com Bitfield<35, 32> sve; 17213117Sgiacomo.travaglini@arm.com Bitfield<31, 28> ras; 17313117Sgiacomo.travaglini@arm.com Bitfield<27, 24> gic; 17413117Sgiacomo.travaglini@arm.com Bitfield<23, 20> advsimd; 17513117Sgiacomo.travaglini@arm.com Bitfield<19, 16> fp; 17613117Sgiacomo.travaglini@arm.com Bitfield<15, 12> el3; 17713117Sgiacomo.travaglini@arm.com Bitfield<11, 8> el2; 17813117Sgiacomo.travaglini@arm.com Bitfield<7, 4> el1; 17913117Sgiacomo.travaglini@arm.com Bitfield<3, 0> el0; 18013117Sgiacomo.travaglini@arm.com EndBitUnion(AA64PFR0) 18113117Sgiacomo.travaglini@arm.com 18213115Sgiacomo.travaglini@arm.com BitUnion32(HDCR) 18313115Sgiacomo.travaglini@arm.com Bitfield<11> tdra; 18413115Sgiacomo.travaglini@arm.com Bitfield<10> tdosa; 18513115Sgiacomo.travaglini@arm.com Bitfield<9> tda; 18613115Sgiacomo.travaglini@arm.com Bitfield<8> tde; 18713115Sgiacomo.travaglini@arm.com Bitfield<7> hpme; 18813115Sgiacomo.travaglini@arm.com Bitfield<6> tpm; 18913115Sgiacomo.travaglini@arm.com Bitfield<5> tpmcr; 19013115Sgiacomo.travaglini@arm.com Bitfield<4, 0> hpmn; 19113115Sgiacomo.travaglini@arm.com EndBitUnion(HDCR) 19213115Sgiacomo.travaglini@arm.com 19313115Sgiacomo.travaglini@arm.com BitUnion32(HCPTR) 19413115Sgiacomo.travaglini@arm.com Bitfield<31> tcpac; 19513115Sgiacomo.travaglini@arm.com Bitfield<20> tta; 19613115Sgiacomo.travaglini@arm.com Bitfield<15> tase; 19713115Sgiacomo.travaglini@arm.com Bitfield<13> tcp13; 19813115Sgiacomo.travaglini@arm.com Bitfield<12> tcp12; 19913115Sgiacomo.travaglini@arm.com Bitfield<11> tcp11; 20013115Sgiacomo.travaglini@arm.com Bitfield<10> tcp10; 20113115Sgiacomo.travaglini@arm.com Bitfield<10> tfp; // AArch64 20213115Sgiacomo.travaglini@arm.com Bitfield<9> tcp9; 20313115Sgiacomo.travaglini@arm.com Bitfield<8> tcp8; 20413759Sgiacomo.gabrielli@arm.com Bitfield<8> tz; // SVE 20513115Sgiacomo.travaglini@arm.com Bitfield<7> tcp7; 20613115Sgiacomo.travaglini@arm.com Bitfield<6> tcp6; 20713115Sgiacomo.travaglini@arm.com Bitfield<5> tcp5; 20813115Sgiacomo.travaglini@arm.com Bitfield<4> tcp4; 20913115Sgiacomo.travaglini@arm.com Bitfield<3> tcp3; 21013115Sgiacomo.travaglini@arm.com Bitfield<2> tcp2; 21113115Sgiacomo.travaglini@arm.com Bitfield<1> tcp1; 21213115Sgiacomo.travaglini@arm.com Bitfield<0> tcp0; 21313115Sgiacomo.travaglini@arm.com EndBitUnion(HCPTR) 21413115Sgiacomo.travaglini@arm.com 21513115Sgiacomo.travaglini@arm.com BitUnion32(HSTR) 21613115Sgiacomo.travaglini@arm.com Bitfield<17> tjdbx; 21713115Sgiacomo.travaglini@arm.com Bitfield<16> ttee; 21813115Sgiacomo.travaglini@arm.com Bitfield<15> t15; 21913115Sgiacomo.travaglini@arm.com Bitfield<13> t13; 22013115Sgiacomo.travaglini@arm.com Bitfield<12> t12; 22113115Sgiacomo.travaglini@arm.com Bitfield<11> t11; 22213115Sgiacomo.travaglini@arm.com Bitfield<10> t10; 22313115Sgiacomo.travaglini@arm.com Bitfield<9> t9; 22413115Sgiacomo.travaglini@arm.com Bitfield<8> t8; 22513115Sgiacomo.travaglini@arm.com Bitfield<7> t7; 22613115Sgiacomo.travaglini@arm.com Bitfield<6> t6; 22713115Sgiacomo.travaglini@arm.com Bitfield<5> t5; 22813115Sgiacomo.travaglini@arm.com Bitfield<4> t4; 22913115Sgiacomo.travaglini@arm.com Bitfield<3> t3; 23013115Sgiacomo.travaglini@arm.com Bitfield<2> t2; 23113115Sgiacomo.travaglini@arm.com Bitfield<1> t1; 23213115Sgiacomo.travaglini@arm.com Bitfield<0> t0; 23313115Sgiacomo.travaglini@arm.com EndBitUnion(HSTR) 23413115Sgiacomo.travaglini@arm.com 23513115Sgiacomo.travaglini@arm.com BitUnion64(HCR) 23613115Sgiacomo.travaglini@arm.com Bitfield<34> e2h; // AArch64 23713115Sgiacomo.travaglini@arm.com Bitfield<33> id; // AArch64 23813115Sgiacomo.travaglini@arm.com Bitfield<32> cd; // AArch64 23913115Sgiacomo.travaglini@arm.com Bitfield<31> rw; // AArch64 24013115Sgiacomo.travaglini@arm.com Bitfield<30> trvm; // AArch64 24113115Sgiacomo.travaglini@arm.com Bitfield<29> hcd; // AArch64 24213115Sgiacomo.travaglini@arm.com Bitfield<28> tdz; // AArch64 24313115Sgiacomo.travaglini@arm.com 24413115Sgiacomo.travaglini@arm.com Bitfield<27> tge; 24513115Sgiacomo.travaglini@arm.com Bitfield<26> tvm; 24613115Sgiacomo.travaglini@arm.com Bitfield<25> ttlb; 24713115Sgiacomo.travaglini@arm.com Bitfield<24> tpu; 24813115Sgiacomo.travaglini@arm.com Bitfield<23> tpc; 24913115Sgiacomo.travaglini@arm.com Bitfield<22> tsw; 25013115Sgiacomo.travaglini@arm.com Bitfield<21> tac; 25113115Sgiacomo.travaglini@arm.com Bitfield<21> tacr; // AArch64 25213115Sgiacomo.travaglini@arm.com Bitfield<20> tidcp; 25313115Sgiacomo.travaglini@arm.com Bitfield<19> tsc; 25413115Sgiacomo.travaglini@arm.com Bitfield<18> tid3; 25513115Sgiacomo.travaglini@arm.com Bitfield<17> tid2; 25613115Sgiacomo.travaglini@arm.com Bitfield<16> tid1; 25713115Sgiacomo.travaglini@arm.com Bitfield<15> tid0; 25813115Sgiacomo.travaglini@arm.com Bitfield<14> twe; 25913115Sgiacomo.travaglini@arm.com Bitfield<13> twi; 26013115Sgiacomo.travaglini@arm.com Bitfield<12> dc; 26113115Sgiacomo.travaglini@arm.com Bitfield<11, 10> bsu; 26213115Sgiacomo.travaglini@arm.com Bitfield<9> fb; 26313115Sgiacomo.travaglini@arm.com Bitfield<8> va; 26413115Sgiacomo.travaglini@arm.com Bitfield<8> vse; // AArch64 26513115Sgiacomo.travaglini@arm.com Bitfield<7> vi; 26613115Sgiacomo.travaglini@arm.com Bitfield<6> vf; 26713115Sgiacomo.travaglini@arm.com Bitfield<5> amo; 26813115Sgiacomo.travaglini@arm.com Bitfield<4> imo; 26913115Sgiacomo.travaglini@arm.com Bitfield<3> fmo; 27013115Sgiacomo.travaglini@arm.com Bitfield<2> ptw; 27113115Sgiacomo.travaglini@arm.com Bitfield<1> swio; 27213115Sgiacomo.travaglini@arm.com Bitfield<0> vm; 27313115Sgiacomo.travaglini@arm.com EndBitUnion(HCR) 27413115Sgiacomo.travaglini@arm.com 27513115Sgiacomo.travaglini@arm.com BitUnion32(NSACR) 27613115Sgiacomo.travaglini@arm.com Bitfield<20> nstrcdis; 27713115Sgiacomo.travaglini@arm.com Bitfield<19> rfr; 27813115Sgiacomo.travaglini@arm.com Bitfield<15> nsasedis; 27913115Sgiacomo.travaglini@arm.com Bitfield<14> nsd32dis; 28013115Sgiacomo.travaglini@arm.com Bitfield<13> cp13; 28113115Sgiacomo.travaglini@arm.com Bitfield<12> cp12; 28213115Sgiacomo.travaglini@arm.com Bitfield<11> cp11; 28313115Sgiacomo.travaglini@arm.com Bitfield<10> cp10; 28413115Sgiacomo.travaglini@arm.com Bitfield<9> cp9; 28513115Sgiacomo.travaglini@arm.com Bitfield<8> cp8; 28613115Sgiacomo.travaglini@arm.com Bitfield<7> cp7; 28713115Sgiacomo.travaglini@arm.com Bitfield<6> cp6; 28813115Sgiacomo.travaglini@arm.com Bitfield<5> cp5; 28913115Sgiacomo.travaglini@arm.com Bitfield<4> cp4; 29013115Sgiacomo.travaglini@arm.com Bitfield<3> cp3; 29113115Sgiacomo.travaglini@arm.com Bitfield<2> cp2; 29213115Sgiacomo.travaglini@arm.com Bitfield<1> cp1; 29313115Sgiacomo.travaglini@arm.com Bitfield<0> cp0; 29413115Sgiacomo.travaglini@arm.com EndBitUnion(NSACR) 29513115Sgiacomo.travaglini@arm.com 29613115Sgiacomo.travaglini@arm.com BitUnion32(SCR) 29713115Sgiacomo.travaglini@arm.com Bitfield<13> twe; 29813115Sgiacomo.travaglini@arm.com Bitfield<12> twi; 29913115Sgiacomo.travaglini@arm.com Bitfield<11> st; // AArch64 30013115Sgiacomo.travaglini@arm.com Bitfield<10> rw; // AArch64 30113115Sgiacomo.travaglini@arm.com Bitfield<9> sif; 30213115Sgiacomo.travaglini@arm.com Bitfield<8> hce; 30313115Sgiacomo.travaglini@arm.com Bitfield<7> scd; 30413115Sgiacomo.travaglini@arm.com Bitfield<7> smd; // AArch64 30513115Sgiacomo.travaglini@arm.com Bitfield<6> nEt; 30613115Sgiacomo.travaglini@arm.com Bitfield<5> aw; 30713115Sgiacomo.travaglini@arm.com Bitfield<4> fw; 30813115Sgiacomo.travaglini@arm.com Bitfield<3> ea; 30913115Sgiacomo.travaglini@arm.com Bitfield<2> fiq; 31013115Sgiacomo.travaglini@arm.com Bitfield<1> irq; 31113115Sgiacomo.travaglini@arm.com Bitfield<0> ns; 31213115Sgiacomo.travaglini@arm.com EndBitUnion(SCR) 31313115Sgiacomo.travaglini@arm.com 31413115Sgiacomo.travaglini@arm.com BitUnion32(SCTLR) 31513115Sgiacomo.travaglini@arm.com Bitfield<30> te; // Thumb Exception Enable (AArch32 only) 31613115Sgiacomo.travaglini@arm.com Bitfield<29> afe; // Access flag enable (AArch32 only) 31713115Sgiacomo.travaglini@arm.com Bitfield<28> tre; // TEX remap enable (AArch32 only) 31813115Sgiacomo.travaglini@arm.com Bitfield<27> nmfi; // Non-maskable FIQ support (ARMv7 only) 31913115Sgiacomo.travaglini@arm.com Bitfield<26> uci; // Enable EL0 access to DC CVAU, DC CIVAC, 32013115Sgiacomo.travaglini@arm.com // DC CVAC and IC IVAU instructions 32113115Sgiacomo.travaglini@arm.com // (AArch64 SCTLR_EL1 only) 32213115Sgiacomo.travaglini@arm.com Bitfield<25> ee; // Exception Endianness 32313115Sgiacomo.travaglini@arm.com Bitfield<24> e0e; // Endianness of explicit data accesses at EL0 32413115Sgiacomo.travaglini@arm.com // (AArch64 SCTLR_EL1 only) 32514128Sgiacomo.travaglini@arm.com Bitfield<23> span; // Set Priviledge Access Never on taking 32614128Sgiacomo.travaglini@arm.com // an exception 32713115Sgiacomo.travaglini@arm.com Bitfield<23> xp; // Extended page table enable (dropped in ARMv7) 32813115Sgiacomo.travaglini@arm.com Bitfield<22> u; // Alignment (dropped in ARMv7) 32913115Sgiacomo.travaglini@arm.com Bitfield<21> fi; // Fast interrupts configuration enable 33013115Sgiacomo.travaglini@arm.com // (ARMv7 only) 33113115Sgiacomo.travaglini@arm.com Bitfield<20> uwxn; // Unprivileged write permission implies EL1 XN 33213115Sgiacomo.travaglini@arm.com // (AArch32 only) 33313115Sgiacomo.travaglini@arm.com Bitfield<19> dz; // Divide by Zero fault enable 33413115Sgiacomo.travaglini@arm.com // (dropped in ARMv7) 33513115Sgiacomo.travaglini@arm.com Bitfield<19> wxn; // Write permission implies XN 33613115Sgiacomo.travaglini@arm.com Bitfield<18> ntwe; // Not trap WFE 33713115Sgiacomo.travaglini@arm.com // (ARMv8 AArch32 and AArch64 SCTLR_EL1 only) 33813115Sgiacomo.travaglini@arm.com Bitfield<18> rao2; // Read as one 33913115Sgiacomo.travaglini@arm.com Bitfield<16> ntwi; // Not trap WFI 34013115Sgiacomo.travaglini@arm.com // (ARMv8 AArch32 and AArch64 SCTLR_EL1 only) 34113115Sgiacomo.travaglini@arm.com Bitfield<16> rao3; // Read as one 34213115Sgiacomo.travaglini@arm.com Bitfield<15> uct; // Enable EL0 access to CTR_EL0 34313115Sgiacomo.travaglini@arm.com // (AArch64 SCTLR_EL1 only) 34413115Sgiacomo.travaglini@arm.com Bitfield<14> rr; // Round Robin select (ARMv7 only) 34513115Sgiacomo.travaglini@arm.com Bitfield<14> dze; // Enable EL0 access to DC ZVA 34613115Sgiacomo.travaglini@arm.com // (AArch64 SCTLR_EL1 only) 34713115Sgiacomo.travaglini@arm.com Bitfield<13> v; // Vectors bit (AArch32 only) 34813115Sgiacomo.travaglini@arm.com Bitfield<12> i; // Instruction cache enable 34913115Sgiacomo.travaglini@arm.com Bitfield<11> z; // Branch prediction enable (ARMv7 only) 35013115Sgiacomo.travaglini@arm.com Bitfield<10> sw; // SWP/SWPB enable (ARMv7 only) 35113115Sgiacomo.travaglini@arm.com Bitfield<9, 8> rs; // Deprecated protection bits (dropped in ARMv7) 35213115Sgiacomo.travaglini@arm.com Bitfield<9> uma; // User mask access (AArch64 SCTLR_EL1 only) 35313115Sgiacomo.travaglini@arm.com Bitfield<8> sed; // SETEND disable 35413115Sgiacomo.travaglini@arm.com // (ARMv8 AArch32 and AArch64 SCTLR_EL1 only) 35513115Sgiacomo.travaglini@arm.com Bitfield<7> b; // Endianness support (dropped in ARMv7) 35613115Sgiacomo.travaglini@arm.com Bitfield<7> itd; // IT disable 35713115Sgiacomo.travaglini@arm.com // (ARMv8 AArch32 and AArch64 SCTLR_EL1 only) 35813115Sgiacomo.travaglini@arm.com Bitfield<6, 3> rao4; // Read as one 35913115Sgiacomo.travaglini@arm.com Bitfield<6> thee; // ThumbEE enable 36013115Sgiacomo.travaglini@arm.com // (ARMv8 AArch32 and AArch64 SCTLR_EL1 only) 36113115Sgiacomo.travaglini@arm.com Bitfield<5> cp15ben; // CP15 barrier enable 36213115Sgiacomo.travaglini@arm.com // (AArch32 and AArch64 SCTLR_EL1 only) 36313115Sgiacomo.travaglini@arm.com Bitfield<4> sa0; // Stack Alignment Check Enable for EL0 36413115Sgiacomo.travaglini@arm.com // (AArch64 SCTLR_EL1 only) 36513115Sgiacomo.travaglini@arm.com Bitfield<3> sa; // Stack Alignment Check Enable (AArch64 only) 36613115Sgiacomo.travaglini@arm.com Bitfield<2> c; // Cache enable 36713115Sgiacomo.travaglini@arm.com Bitfield<1> a; // Alignment check enable 36813115Sgiacomo.travaglini@arm.com Bitfield<0> m; // MMU enable 36913115Sgiacomo.travaglini@arm.com EndBitUnion(SCTLR) 37013115Sgiacomo.travaglini@arm.com 37113115Sgiacomo.travaglini@arm.com BitUnion32(CPACR) 37213115Sgiacomo.travaglini@arm.com Bitfield<1, 0> cp0; 37313115Sgiacomo.travaglini@arm.com Bitfield<3, 2> cp1; 37413115Sgiacomo.travaglini@arm.com Bitfield<5, 4> cp2; 37513115Sgiacomo.travaglini@arm.com Bitfield<7, 6> cp3; 37613115Sgiacomo.travaglini@arm.com Bitfield<9, 8> cp4; 37713115Sgiacomo.travaglini@arm.com Bitfield<11, 10> cp5; 37813115Sgiacomo.travaglini@arm.com Bitfield<13, 12> cp6; 37913115Sgiacomo.travaglini@arm.com Bitfield<15, 14> cp7; 38013115Sgiacomo.travaglini@arm.com Bitfield<17, 16> cp8; 38113759Sgiacomo.gabrielli@arm.com Bitfield<17, 16> zen; // SVE 38213115Sgiacomo.travaglini@arm.com Bitfield<19, 18> cp9; 38313115Sgiacomo.travaglini@arm.com Bitfield<21, 20> cp10; 38413115Sgiacomo.travaglini@arm.com Bitfield<21, 20> fpen; // AArch64 38513115Sgiacomo.travaglini@arm.com Bitfield<23, 22> cp11; 38613115Sgiacomo.travaglini@arm.com Bitfield<25, 24> cp12; 38713115Sgiacomo.travaglini@arm.com Bitfield<27, 26> cp13; 38813115Sgiacomo.travaglini@arm.com Bitfield<29, 28> rsvd; 38913115Sgiacomo.travaglini@arm.com Bitfield<28> tta; // AArch64 39013115Sgiacomo.travaglini@arm.com Bitfield<30> d32dis; 39113115Sgiacomo.travaglini@arm.com Bitfield<31> asedis; 39213115Sgiacomo.travaglini@arm.com EndBitUnion(CPACR) 39313115Sgiacomo.travaglini@arm.com 39413115Sgiacomo.travaglini@arm.com BitUnion32(FSR) 39513115Sgiacomo.travaglini@arm.com Bitfield<3, 0> fsLow; 39613115Sgiacomo.travaglini@arm.com Bitfield<5, 0> status; // LPAE 39713115Sgiacomo.travaglini@arm.com Bitfield<7, 4> domain; 39813115Sgiacomo.travaglini@arm.com Bitfield<9> lpae; 39913115Sgiacomo.travaglini@arm.com Bitfield<10> fsHigh; 40013115Sgiacomo.travaglini@arm.com Bitfield<11> wnr; 40113115Sgiacomo.travaglini@arm.com Bitfield<12> ext; 40213115Sgiacomo.travaglini@arm.com Bitfield<13> cm; // LPAE 40313115Sgiacomo.travaglini@arm.com EndBitUnion(FSR) 40413115Sgiacomo.travaglini@arm.com 40513115Sgiacomo.travaglini@arm.com BitUnion32(FPSCR) 40613115Sgiacomo.travaglini@arm.com Bitfield<0> ioc; 40713115Sgiacomo.travaglini@arm.com Bitfield<1> dzc; 40813115Sgiacomo.travaglini@arm.com Bitfield<2> ofc; 40913115Sgiacomo.travaglini@arm.com Bitfield<3> ufc; 41013115Sgiacomo.travaglini@arm.com Bitfield<4> ixc; 41113115Sgiacomo.travaglini@arm.com Bitfield<7> idc; 41213115Sgiacomo.travaglini@arm.com Bitfield<8> ioe; 41313115Sgiacomo.travaglini@arm.com Bitfield<9> dze; 41413115Sgiacomo.travaglini@arm.com Bitfield<10> ofe; 41513115Sgiacomo.travaglini@arm.com Bitfield<11> ufe; 41613115Sgiacomo.travaglini@arm.com Bitfield<12> ixe; 41713115Sgiacomo.travaglini@arm.com Bitfield<15> ide; 41813115Sgiacomo.travaglini@arm.com Bitfield<18, 16> len; 41913118SEdmund.Grimley-Evans@arm.com Bitfield<19> fz16; 42013115Sgiacomo.travaglini@arm.com Bitfield<21, 20> stride; 42113115Sgiacomo.travaglini@arm.com Bitfield<23, 22> rMode; 42213115Sgiacomo.travaglini@arm.com Bitfield<24> fz; 42313115Sgiacomo.travaglini@arm.com Bitfield<25> dn; 42413115Sgiacomo.travaglini@arm.com Bitfield<26> ahp; 42513115Sgiacomo.travaglini@arm.com Bitfield<27> qc; 42613115Sgiacomo.travaglini@arm.com Bitfield<28> v; 42713115Sgiacomo.travaglini@arm.com Bitfield<29> c; 42813115Sgiacomo.travaglini@arm.com Bitfield<30> z; 42913115Sgiacomo.travaglini@arm.com Bitfield<31> n; 43013115Sgiacomo.travaglini@arm.com EndBitUnion(FPSCR) 43113115Sgiacomo.travaglini@arm.com 43213115Sgiacomo.travaglini@arm.com BitUnion32(FPEXC) 43313115Sgiacomo.travaglini@arm.com Bitfield<31> ex; 43413115Sgiacomo.travaglini@arm.com Bitfield<30> en; 43513115Sgiacomo.travaglini@arm.com Bitfield<29, 0> subArchDefined; 43613115Sgiacomo.travaglini@arm.com EndBitUnion(FPEXC) 43713115Sgiacomo.travaglini@arm.com 43813115Sgiacomo.travaglini@arm.com BitUnion32(MVFR0) 43913115Sgiacomo.travaglini@arm.com Bitfield<3, 0> advSimdRegisters; 44013115Sgiacomo.travaglini@arm.com Bitfield<7, 4> singlePrecision; 44113115Sgiacomo.travaglini@arm.com Bitfield<11, 8> doublePrecision; 44213115Sgiacomo.travaglini@arm.com Bitfield<15, 12> vfpExceptionTrapping; 44313115Sgiacomo.travaglini@arm.com Bitfield<19, 16> divide; 44413115Sgiacomo.travaglini@arm.com Bitfield<23, 20> squareRoot; 44513115Sgiacomo.travaglini@arm.com Bitfield<27, 24> shortVectors; 44613115Sgiacomo.travaglini@arm.com Bitfield<31, 28> roundingModes; 44713115Sgiacomo.travaglini@arm.com EndBitUnion(MVFR0) 44813115Sgiacomo.travaglini@arm.com 44913115Sgiacomo.travaglini@arm.com BitUnion32(MVFR1) 45013115Sgiacomo.travaglini@arm.com Bitfield<3, 0> flushToZero; 45113115Sgiacomo.travaglini@arm.com Bitfield<7, 4> defaultNaN; 45213115Sgiacomo.travaglini@arm.com Bitfield<11, 8> advSimdLoadStore; 45313115Sgiacomo.travaglini@arm.com Bitfield<15, 12> advSimdInteger; 45413115Sgiacomo.travaglini@arm.com Bitfield<19, 16> advSimdSinglePrecision; 45513115Sgiacomo.travaglini@arm.com Bitfield<23, 20> advSimdHalfPrecision; 45613115Sgiacomo.travaglini@arm.com Bitfield<27, 24> vfpHalfPrecision; 45713115Sgiacomo.travaglini@arm.com Bitfield<31, 28> raz; 45813115Sgiacomo.travaglini@arm.com EndBitUnion(MVFR1) 45913115Sgiacomo.travaglini@arm.com 46013115Sgiacomo.travaglini@arm.com BitUnion64(TTBCR) 46113115Sgiacomo.travaglini@arm.com // Short-descriptor translation table format 46213115Sgiacomo.travaglini@arm.com Bitfield<2, 0> n; 46313115Sgiacomo.travaglini@arm.com Bitfield<4> pd0; 46413115Sgiacomo.travaglini@arm.com Bitfield<5> pd1; 46513115Sgiacomo.travaglini@arm.com // Long-descriptor translation table format 46613115Sgiacomo.travaglini@arm.com Bitfield<2, 0> t0sz; 46713528Sivan.pizarro@metempsy.com Bitfield<6> t2e; 46813115Sgiacomo.travaglini@arm.com Bitfield<7> epd0; 46913115Sgiacomo.travaglini@arm.com Bitfield<9, 8> irgn0; 47013115Sgiacomo.travaglini@arm.com Bitfield<11, 10> orgn0; 47113115Sgiacomo.travaglini@arm.com Bitfield<13, 12> sh0; 47213115Sgiacomo.travaglini@arm.com Bitfield<14> tg0; 47313115Sgiacomo.travaglini@arm.com Bitfield<18, 16> t1sz; 47413115Sgiacomo.travaglini@arm.com Bitfield<22> a1; 47513115Sgiacomo.travaglini@arm.com Bitfield<23> epd1; 47613115Sgiacomo.travaglini@arm.com Bitfield<25, 24> irgn1; 47713115Sgiacomo.travaglini@arm.com Bitfield<27, 26> orgn1; 47813115Sgiacomo.travaglini@arm.com Bitfield<29, 28> sh1; 47913115Sgiacomo.travaglini@arm.com Bitfield<30> tg1; 48013115Sgiacomo.travaglini@arm.com Bitfield<34, 32> ips; 48113115Sgiacomo.travaglini@arm.com Bitfield<36> as; 48213115Sgiacomo.travaglini@arm.com Bitfield<37> tbi0; 48313115Sgiacomo.travaglini@arm.com Bitfield<38> tbi1; 48413115Sgiacomo.travaglini@arm.com // Common 48513115Sgiacomo.travaglini@arm.com Bitfield<31> eae; 48613115Sgiacomo.travaglini@arm.com // TCR_EL2/3 (AArch64) 48713115Sgiacomo.travaglini@arm.com Bitfield<18, 16> ps; 48813115Sgiacomo.travaglini@arm.com Bitfield<20> tbi; 48913528Sivan.pizarro@metempsy.com Bitfield<41> hpd0; 49013528Sivan.pizarro@metempsy.com Bitfield<42> hpd1; 49113115Sgiacomo.travaglini@arm.com EndBitUnion(TTBCR) 49213115Sgiacomo.travaglini@arm.com 49313115Sgiacomo.travaglini@arm.com // Fields of TCR_EL{1,2,3} (mostly overlapping) 49413115Sgiacomo.travaglini@arm.com // TCR_EL1 is natively 64 bits, the others are 32 bits 49513115Sgiacomo.travaglini@arm.com BitUnion64(TCR) 49613115Sgiacomo.travaglini@arm.com Bitfield<5, 0> t0sz; 49713115Sgiacomo.travaglini@arm.com Bitfield<7> epd0; // EL1 49813115Sgiacomo.travaglini@arm.com Bitfield<9, 8> irgn0; 49913115Sgiacomo.travaglini@arm.com Bitfield<11, 10> orgn0; 50013115Sgiacomo.travaglini@arm.com Bitfield<13, 12> sh0; 50113115Sgiacomo.travaglini@arm.com Bitfield<15, 14> tg0; 50213115Sgiacomo.travaglini@arm.com Bitfield<18, 16> ps; 50313115Sgiacomo.travaglini@arm.com Bitfield<20> tbi; // EL2/EL3 50413115Sgiacomo.travaglini@arm.com Bitfield<21, 16> t1sz; // EL1 50513115Sgiacomo.travaglini@arm.com Bitfield<22> a1; // EL1 50613115Sgiacomo.travaglini@arm.com Bitfield<23> epd1; // EL1 50714094Sgiacomo.travaglini@arm.com Bitfield<24> hpd; // EL2/EL3, E2H=0 50813115Sgiacomo.travaglini@arm.com Bitfield<25, 24> irgn1; // EL1 50913115Sgiacomo.travaglini@arm.com Bitfield<27, 26> orgn1; // EL1 51013115Sgiacomo.travaglini@arm.com Bitfield<29, 28> sh1; // EL1 51113115Sgiacomo.travaglini@arm.com Bitfield<31, 30> tg1; // EL1 51213115Sgiacomo.travaglini@arm.com Bitfield<34, 32> ips; // EL1 51313115Sgiacomo.travaglini@arm.com Bitfield<36> as; // EL1 51413115Sgiacomo.travaglini@arm.com Bitfield<37> tbi0; // EL1 51513115Sgiacomo.travaglini@arm.com Bitfield<38> tbi1; // EL1 51613528Sivan.pizarro@metempsy.com Bitfield<39> ha; 51713528Sivan.pizarro@metempsy.com Bitfield<40> hd; 51813528Sivan.pizarro@metempsy.com Bitfield<41> hpd0; 51913528Sivan.pizarro@metempsy.com Bitfield<42> hpd1; 52013115Sgiacomo.travaglini@arm.com EndBitUnion(TCR) 52113115Sgiacomo.travaglini@arm.com 52213115Sgiacomo.travaglini@arm.com BitUnion32(HTCR) 52313115Sgiacomo.travaglini@arm.com Bitfield<2, 0> t0sz; 52413115Sgiacomo.travaglini@arm.com Bitfield<9, 8> irgn0; 52513115Sgiacomo.travaglini@arm.com Bitfield<11, 10> orgn0; 52613115Sgiacomo.travaglini@arm.com Bitfield<13, 12> sh0; 52713528Sivan.pizarro@metempsy.com Bitfield<24> hpd; 52813115Sgiacomo.travaglini@arm.com EndBitUnion(HTCR) 52913115Sgiacomo.travaglini@arm.com 53013115Sgiacomo.travaglini@arm.com BitUnion32(VTCR_t) 53113115Sgiacomo.travaglini@arm.com Bitfield<3, 0> t0sz; 53213115Sgiacomo.travaglini@arm.com Bitfield<4> s; 53313115Sgiacomo.travaglini@arm.com Bitfield<5, 0> t0sz64; 53413115Sgiacomo.travaglini@arm.com Bitfield<7, 6> sl0; 53513115Sgiacomo.travaglini@arm.com Bitfield<9, 8> irgn0; 53613115Sgiacomo.travaglini@arm.com Bitfield<11, 10> orgn0; 53713115Sgiacomo.travaglini@arm.com Bitfield<13, 12> sh0; 53813115Sgiacomo.travaglini@arm.com Bitfield<15, 14> tg0; 53913115Sgiacomo.travaglini@arm.com Bitfield<18, 16> ps; // Only defined for VTCR_EL2 54013528Sivan.pizarro@metempsy.com Bitfield<21> ha; // Only defined for VTCR_EL2 54113528Sivan.pizarro@metempsy.com Bitfield<22> hd; // Only defined for VTCR_EL2 54213115Sgiacomo.travaglini@arm.com EndBitUnion(VTCR_t) 54313115Sgiacomo.travaglini@arm.com 54413115Sgiacomo.travaglini@arm.com BitUnion32(PRRR) 54513115Sgiacomo.travaglini@arm.com Bitfield<1,0> tr0; 54613115Sgiacomo.travaglini@arm.com Bitfield<3,2> tr1; 54713115Sgiacomo.travaglini@arm.com Bitfield<5,4> tr2; 54813115Sgiacomo.travaglini@arm.com Bitfield<7,6> tr3; 54913115Sgiacomo.travaglini@arm.com Bitfield<9,8> tr4; 55013115Sgiacomo.travaglini@arm.com Bitfield<11,10> tr5; 55113115Sgiacomo.travaglini@arm.com Bitfield<13,12> tr6; 55213115Sgiacomo.travaglini@arm.com Bitfield<15,14> tr7; 55313115Sgiacomo.travaglini@arm.com Bitfield<16> ds0; 55413115Sgiacomo.travaglini@arm.com Bitfield<17> ds1; 55513115Sgiacomo.travaglini@arm.com Bitfield<18> ns0; 55613115Sgiacomo.travaglini@arm.com Bitfield<19> ns1; 55713115Sgiacomo.travaglini@arm.com Bitfield<24> nos0; 55813115Sgiacomo.travaglini@arm.com Bitfield<25> nos1; 55913115Sgiacomo.travaglini@arm.com Bitfield<26> nos2; 56013115Sgiacomo.travaglini@arm.com Bitfield<27> nos3; 56113115Sgiacomo.travaglini@arm.com Bitfield<28> nos4; 56213115Sgiacomo.travaglini@arm.com Bitfield<29> nos5; 56313115Sgiacomo.travaglini@arm.com Bitfield<30> nos6; 56413115Sgiacomo.travaglini@arm.com Bitfield<31> nos7; 56513115Sgiacomo.travaglini@arm.com EndBitUnion(PRRR) 56613115Sgiacomo.travaglini@arm.com 56713115Sgiacomo.travaglini@arm.com BitUnion32(NMRR) 56813115Sgiacomo.travaglini@arm.com Bitfield<1,0> ir0; 56913115Sgiacomo.travaglini@arm.com Bitfield<3,2> ir1; 57013115Sgiacomo.travaglini@arm.com Bitfield<5,4> ir2; 57113115Sgiacomo.travaglini@arm.com Bitfield<7,6> ir3; 57213115Sgiacomo.travaglini@arm.com Bitfield<9,8> ir4; 57313115Sgiacomo.travaglini@arm.com Bitfield<11,10> ir5; 57413115Sgiacomo.travaglini@arm.com Bitfield<13,12> ir6; 57513115Sgiacomo.travaglini@arm.com Bitfield<15,14> ir7; 57613115Sgiacomo.travaglini@arm.com Bitfield<17,16> or0; 57713115Sgiacomo.travaglini@arm.com Bitfield<19,18> or1; 57813115Sgiacomo.travaglini@arm.com Bitfield<21,20> or2; 57913115Sgiacomo.travaglini@arm.com Bitfield<23,22> or3; 58013115Sgiacomo.travaglini@arm.com Bitfield<25,24> or4; 58113115Sgiacomo.travaglini@arm.com Bitfield<27,26> or5; 58213115Sgiacomo.travaglini@arm.com Bitfield<29,28> or6; 58313115Sgiacomo.travaglini@arm.com Bitfield<31,30> or7; 58413115Sgiacomo.travaglini@arm.com EndBitUnion(NMRR) 58513115Sgiacomo.travaglini@arm.com 58613115Sgiacomo.travaglini@arm.com BitUnion32(CONTEXTIDR) 58713115Sgiacomo.travaglini@arm.com Bitfield<7,0> asid; 58813115Sgiacomo.travaglini@arm.com Bitfield<31,8> procid; 58913115Sgiacomo.travaglini@arm.com EndBitUnion(CONTEXTIDR) 59013115Sgiacomo.travaglini@arm.com 59113115Sgiacomo.travaglini@arm.com BitUnion32(L2CTLR) 59213115Sgiacomo.travaglini@arm.com Bitfield<2,0> sataRAMLatency; 59313115Sgiacomo.travaglini@arm.com Bitfield<4,3> reserved_4_3; 59413115Sgiacomo.travaglini@arm.com Bitfield<5> dataRAMSetup; 59513115Sgiacomo.travaglini@arm.com Bitfield<8,6> tagRAMLatency; 59613115Sgiacomo.travaglini@arm.com Bitfield<9> tagRAMSetup; 59713115Sgiacomo.travaglini@arm.com Bitfield<11,10> dataRAMSlice; 59813115Sgiacomo.travaglini@arm.com Bitfield<12> tagRAMSlice; 59913115Sgiacomo.travaglini@arm.com Bitfield<20,13> reserved_20_13; 60013115Sgiacomo.travaglini@arm.com Bitfield<21> eccandParityEnable; 60113115Sgiacomo.travaglini@arm.com Bitfield<22> reserved_22; 60213115Sgiacomo.travaglini@arm.com Bitfield<23> interptCtrlPresent; 60313115Sgiacomo.travaglini@arm.com Bitfield<25,24> numCPUs; 60413115Sgiacomo.travaglini@arm.com Bitfield<30,26> reserved_30_26; 60513115Sgiacomo.travaglini@arm.com Bitfield<31> l2rstDISABLE_monitor; 60613115Sgiacomo.travaglini@arm.com EndBitUnion(L2CTLR) 60713115Sgiacomo.travaglini@arm.com 60813115Sgiacomo.travaglini@arm.com BitUnion32(CTR) 60913115Sgiacomo.travaglini@arm.com Bitfield<3,0> iCacheLineSize; 61013115Sgiacomo.travaglini@arm.com Bitfield<13,4> raz_13_4; 61113115Sgiacomo.travaglini@arm.com Bitfield<15,14> l1IndexPolicy; 61213115Sgiacomo.travaglini@arm.com Bitfield<19,16> dCacheLineSize; 61313115Sgiacomo.travaglini@arm.com Bitfield<23,20> erg; 61413115Sgiacomo.travaglini@arm.com Bitfield<27,24> cwg; 61513115Sgiacomo.travaglini@arm.com Bitfield<28> raz_28; 61613115Sgiacomo.travaglini@arm.com Bitfield<31,29> format; 61713115Sgiacomo.travaglini@arm.com EndBitUnion(CTR) 61813115Sgiacomo.travaglini@arm.com 61913115Sgiacomo.travaglini@arm.com BitUnion32(PMSELR) 62013115Sgiacomo.travaglini@arm.com Bitfield<4, 0> sel; 62113115Sgiacomo.travaglini@arm.com EndBitUnion(PMSELR) 62213115Sgiacomo.travaglini@arm.com 62313115Sgiacomo.travaglini@arm.com BitUnion64(PAR) 62413115Sgiacomo.travaglini@arm.com // 64-bit format 62513115Sgiacomo.travaglini@arm.com Bitfield<63, 56> attr; 62613115Sgiacomo.travaglini@arm.com Bitfield<39, 12> pa; 62713115Sgiacomo.travaglini@arm.com Bitfield<11> lpae; 62813115Sgiacomo.travaglini@arm.com Bitfield<9> ns; 62913115Sgiacomo.travaglini@arm.com Bitfield<8, 7> sh; 63013115Sgiacomo.travaglini@arm.com Bitfield<0> f; 63113115Sgiacomo.travaglini@arm.com EndBitUnion(PAR) 63213115Sgiacomo.travaglini@arm.com 63313115Sgiacomo.travaglini@arm.com BitUnion32(ESR) 63413115Sgiacomo.travaglini@arm.com Bitfield<31, 26> ec; 63513115Sgiacomo.travaglini@arm.com Bitfield<25> il; 63613115Sgiacomo.travaglini@arm.com Bitfield<15, 0> imm16; 63713115Sgiacomo.travaglini@arm.com EndBitUnion(ESR) 63813115Sgiacomo.travaglini@arm.com 63913115Sgiacomo.travaglini@arm.com BitUnion32(CPTR) 64013115Sgiacomo.travaglini@arm.com Bitfield<31> tcpac; 64113115Sgiacomo.travaglini@arm.com Bitfield<20> tta; 64213115Sgiacomo.travaglini@arm.com Bitfield<13, 12> res1_13_12_el2; 64313115Sgiacomo.travaglini@arm.com Bitfield<10> tfp; 64413759Sgiacomo.gabrielli@arm.com Bitfield<9> res1_9_el2; 64513759Sgiacomo.gabrielli@arm.com Bitfield<8> res1_8_el2; 64613759Sgiacomo.gabrielli@arm.com Bitfield<8> ez; // SVE (CPTR_EL3) 64713759Sgiacomo.gabrielli@arm.com Bitfield<8> tz; // SVE (CPTR_EL2) 64813759Sgiacomo.gabrielli@arm.com Bitfield<7, 0> res1_7_0_el2; 64913115Sgiacomo.travaglini@arm.com EndBitUnion(CPTR) 65013115Sgiacomo.travaglini@arm.com 65113759Sgiacomo.gabrielli@arm.com BitUnion64(ZCR) 65213759Sgiacomo.gabrielli@arm.com Bitfield<3, 0> len; 65313759Sgiacomo.gabrielli@arm.com EndBitUnion(ZCR) 65413759Sgiacomo.gabrielli@arm.com 65513115Sgiacomo.travaglini@arm.com} 65613115Sgiacomo.travaglini@arm.com 65713115Sgiacomo.travaglini@arm.com#endif // __ARCH_ARM_MISCREGS_TYPES_HH__ 658