Searched refs:ide (Results 1 - 7 of 7) sorted by relevance
| /gem5/src/dev/x86/ |
| H A D | SouthBridge.py | 70 ide = IdeController(disks=[], pci_func=0, pci_dev=4, pci_bus=0) variable in class:SouthBridge
71 ide.BAR0 = 0x1f0
72 ide.BAR0LegacyIO = True
73 ide.BAR1 = 0x3f4
74 ide.BAR1Size = '3B'
75 ide.BAR1LegacyIO = True
76 ide.BAR2 = 0x170
77 ide.BAR2LegacyIO = True
78 ide.BAR3 = 0x374
79 ide
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| /gem5/configs/common/ |
| H A D | FSConfig.py | 85 ide = IdeController(disks=[Parent.disk0, Parent.disk2], variable in class:makeLinuxAlphaSystem.BaseTsunami
100 self.tsunami.ide.pio = self.iobus.master
107 self._dma_ports = [self.tsunami.ide.dma, self.tsunami.ethernet.dma]
119 self.tsunami.ide.dma = self.iobus.slave
255 if hasattr(self.realview, "ide"):
256 self.realview.ide.disks = [self.cf0]
402 ide = IdeController(disks=[Parent.disk0, Parent.disk2], variable in class:makeLinuxMipsSystem.BaseMalta
422 self.malta.ide.pio = self.iobus.master
423 self.malta.ide.dma = self.iobus.slave
492 # add the ide t
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| /gem5/src/dev/net/ |
| H A D | i8254xGBe_defs.hh | 249 inline bool ide(TxDesc *d) { return bits(d->d2, 31,31) && (getType(d) == TXD_DATA || isLegacy(d)); } function in namespace:iGbReg::TxdOp
751 ADD_FIELD32(ide, 4,1);
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| H A D | i8254xGBe.cc | 1910 if (TxdOp::ide(desc)) {
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| /gem5/src/arch/arm/ |
| H A D | miscregs_types.hh | 417 Bitfield<15> ide; member in namespace:ArmISA
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| H A D | isa.cc | 932 fpscrMask.ide = ones;
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| /gem5/src/dev/arm/ |
| H A D | RealView.py | 856 if hasattr(self, "ide"):
857 devices.append(self.ide)
866 self.ide = IdeController(disks = [], pci_bus=0, pci_dev=1, pci_func=0,
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