| /gem5/tests/test-progs/asmtest/src/riscv/isa/rv64ud/ |
| H A D | ldst.S | 16 la s0, tdat
17 TEST_CASE(2, a0, 0x40000000bf800000, fld f2, 0(s0); fsd f2, 16(s0); ld a0, 16(s0))
18 TEST_CASE(3, a0, 0x40000000bf800000, fld f2, 0(s0); fsw f2, 16(s0); ld a0, 16(s0))
19 TEST_CASE(4, a0, 0x40000000bf800000, flw f2, 0(s0); fsw f2, 16(s0); ld a0, 16(s0))
[all...] |
| /gem5/tests/test-progs/asmtest/src/riscv/isa/rv64mi/ |
| H A D | ma_addr.S | 19 la s0, data
37 MISALIGNED_LOAD_TEST(2, lh, s0, 1, SEXT(0xbbcc, 16))
38 MISALIGNED_LOAD_TEST(3, lhu, s0, 1, 0xbbcc)
39 MISALIGNED_LOAD_TEST(4, lw, s0, 1, SEXT(0x99aabbcc, 32))
40 MISALIGNED_LOAD_TEST(5, lw, s0, 2, SEXT(0x8899aabb, 32))
41 MISALIGNED_LOAD_TEST(6, lw, s0, 3, SEXT(0x778899aa, 32))
44 MISALIGNED_LOAD_TEST(7, lwu, s0, 1, 0x99aabbcc)
45 MISALIGNED_LOAD_TEST(8, lwu, s0, 2, 0x8899aabb)
46 MISALIGNED_LOAD_TEST(9, lwu, s0, 3, 0x778899aa)
48 MISALIGNED_LOAD_TEST(10, ld, s0,
[all...] |
| H A D | illegal.S | 38 csrrw s0, mtvec, t0
46 csrw mtvec, s0
|
| /gem5/tests/test-progs/asmtest/src/riscv/isa/rv64uc/ |
| H A D | rvc.S | 53 RVC_TEST_CASE (11, s0, 0xffffffffffffffe1, c.lui s0, 0xfffe1; c.srai s0, 12)
55 RVC_TEST_CASE (12, s0, 0x000fffffffffffe1, c.lui s0, 0xfffe1; c.srli s0, 12)
57 RVC_TEST_CASE (12, s0, 0x000fffe1, c.lui s0, 0xfffe1; c.srli s0, 12)
59 RVC_TEST_CASE (14, s0, ~
[all...] |
| /gem5/system/alpha/console/ |
| H A D | paljtoslave.S | 86 ldq_p s0, PCB_Q_PTBR(a5)
87 sll s0, VA_S_OFF, s0 // Shift PTBR into position
89 mtpr s0, ptPtbr // PHYSICAL MBOX INST -> MT PT20 IN 0,1
|
| H A D | paljtokern.S | 51 * s0 first free PFN
98 ldq_p s0, PCB_Q_PTBR(a1)
99 sll s0, VA_S_OFF, s0 // Shift PTBR into position
101 mtpr s0, ptPtbr // PHYSICAL MBOX INST -> MT PT20 IN 0,1
|
| H A D | dbmentry.S | 67 cpuz: bis sp,sp,s0 /* save sp */
92 beq s0,master
|
| /gem5/tests/test-progs/asmtest/src/riscv/isa/macros/mt/ |
| H A D | test_macros_mt.h | 85 mv s0, ra // save return register variable
93 mv ra, s0 // restore return register
132 mv s0, ra // save return register variable
139 mv ra, s0 // restore return register
|
| H A D | test_macros_mt_ecall.h | 161 mv s0, ra // save return register variable
223 mv ra, s0
265 mv s0, ra // save return register variable
285 mv ra, s0 // restore return register
325 mv s0, ra // save return register variable
345 mv ra, s0 // restore return register
|
| /gem5/tests/test-progs/asmtest/src/riscv/isa/rv64samt/ |
| H A D | sysfutex1_d.S | 88 mv s0, ra // save return address
107 mv ra, s0
|
| H A D | sysclone_d.S | 120 mv s0, ra // save return register
148 mv ra, s0 // restore return register
|
| H A D | sysfutex3_d.S | 88 mv s0, ra // save return address
137 mv ra, s0
|
| H A D | sysfutex_d.S | 89 mv s0, ra // save return address
121 mv ra, s0
|
| H A D | sysfutex2_d.S | 91 mv s0, ra // save return address
132 mv ra, s0
|
| /gem5/system/alpha/h/ |
| H A D | fromHudsonOsf.h | 370 #define s0 $9 /* Saved (Non-Volatile) Registers ... */ macro
|
| /gem5/src/arch/arm/insts/ |
| H A D | fplib.cc | 178 uint64_t s0 = p0; local
179 uint64_t s1 = (s0 >> 31) + p1;
181 *x0 = (s0 & mask) | (s1 & mask) << 31 | s2 << 62;
|