1/*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * Copyright (c) 1993 The Hewlett-Packard Development Company
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include "dc21164FromGasSources.h"	// DECchip 21164 specific definitions
31#include "ev5_defs.h"
32#include "fromHudsonOsf.h"		// OSF/1 specific definitions
33#include "fromHudsonMacros.h"		// Global macro definitions
34
35/* Jump to kernel
36 * args:
37 *	Kernel address - a0
38 *	PCBB           - a1
39 *	First free PFN - a3?
40 *
41 *	Enable kseg addressing in ICSR
42 *	Enable kseg addressing in MCSR
43 *	Set VTBR -- Set to 1GB as per SRM, or maybe 8GB??
44 *	Set PCBB -- pass pointer in arg
45 *	Set PTBR -- get it out of PCB
46 *	Set KSP  -- get it out of PCB
47 *
48 *	Jump to kernel address
49 *
50 *	Kernel args-
51 *	s0 first free PFN
52 *	s1 ptbr
53 *	s2 argc 0
54 *	s3 argv NULL
55 *	s5 osf_param (sysconfigtab) NULL
56 */
57
58        .global palJToKern
59        .text 3
60palJToKern:
61        ALIGN_BRANCH
62
63        ldq_p	a0, 0(zero)
64        ldq_p	a1, 8(zero)
65        ldq_p	a3, 16(zero)
66
67        /* Point the Vptbr at 8GB */
68        lda	t0, 0x1(zero)
69        sll	t0, 33, t0
70
71        mtpr	t0, mVptBr	// Load Mbox copy
72        mtpr	t0, iVptBr	// Load Ibox copy
73        STALL			// don't dual issue the load with mtpr -pb
74
75        /* Turn on superpage mapping in the mbox and icsr */
76        lda	t0, (2<<MCSR_V_SP)(zero) // Get a '10' (binary) in MCSR<SP>
77        STALL			// don't dual issue the load with mtpr -pb
78        mtpr	t0, mcsr	// Set the super page mode enable bit
79        STALL			// don't dual issue the load with mtpr -pb
80
81        lda	t0, 0(zero)
82        mtpr	t0, dtbAsn
83        mtpr	t0, itbAsn
84
85        LDLI	(t1,0x20000000)
86        STALL			// don't dual issue the load with mtpr -pb
87        mfpr	t0, icsr	// Enable superpage mapping
88        STALL			// don't dual issue the load with mtpr -pb
89        bis	t0, t1, t0
90        mtpr	t0, icsr
91
92        STALL			// Required stall to update chip ...
93        STALL
94        STALL
95        STALL
96        STALL
97
98        ldq_p	s0, PCB_Q_PTBR(a1)
99        sll	s0, VA_S_OFF, s0 // Shift PTBR into position
100        STALL			// don't dual issue the load with mtpr -pb
101        mtpr	s0, ptPtbr	// PHYSICAL MBOX INST -> MT PT20 IN 0,1
102        STALL			// don't dual issue the load with mtpr -pb
103        ldq_p	sp, PCB_Q_KSP(a1)
104
105        mtpr	a0, excAddr	// Load the dispatch address.
106        STALL			// don't dual issue the load with mtpr -pb
107        bis	a3, zero, a0	// first free PFN
108        ldq_p	a1, PCB_Q_PTBR(a1) // ptbr
109        ldq_p	a2, 24(zero)	// argc
110        ldq_p	a3, 32(zero)	// argv
111        ldq_p	a4, 40(zero)	// environ
112        lda	a5, 0(zero)	// osf_param
113        STALL			// don't dual issue the load with mtpr -pb
114        mtpr	zero, dtbIa	// Flush all D-stream TB entries
115        mtpr	zero, itbIa	// Flush all I-stream TB entries
116        br	zero, 2f
117
118        ALIGN_BLOCK
119
1202:      NOP
121        mtpr	zero, icFlush	// Flush the icache.
122        NOP
123        NOP
124
125        NOP			// Required NOPs ... 1-10
126        NOP
127        NOP
128        NOP
129        NOP
130        NOP
131        NOP
132        NOP
133        NOP
134        NOP
135
136        NOP			// Required NOPs ... 11-20
137        NOP
138        NOP
139        NOP
140        NOP
141        NOP
142        NOP
143        NOP
144        NOP
145        NOP
146
147        NOP			// Required NOPs ... 21-30
148        NOP
149        NOP
150        NOP
151        NOP
152        NOP
153        NOP
154        NOP
155        NOP
156        NOP
157
158        NOP			// Required NOPs ... 31-40
159        NOP
160        NOP
161        NOP
162        NOP
163        NOP
164        NOP
165        NOP
166        NOP
167        NOP
168
169        NOP			// Required NOPs ... 41-44
170        NOP
171        NOP
172        NOP
173
174        hw_rei_stall		// Dispatch to kernel
175