112771Sqtt2@cornell.edu# See LICENSE for license details. 212771Sqtt2@cornell.edu 312771Sqtt2@cornell.edu#***************************************************************************** 412771Sqtt2@cornell.edu# ma_addr.S 512771Sqtt2@cornell.edu#----------------------------------------------------------------------------- 612771Sqtt2@cornell.edu# 712771Sqtt2@cornell.edu# Test misaligned ld/st trap. 812771Sqtt2@cornell.edu# 912771Sqtt2@cornell.edu 1012771Sqtt2@cornell.edu#include "riscv_test.h" 1112771Sqtt2@cornell.edu#include "test_macros.h" 1212771Sqtt2@cornell.edu 1312771Sqtt2@cornell.eduRVTEST_RV64M 1412771Sqtt2@cornell.eduRVTEST_CODE_BEGIN 1512771Sqtt2@cornell.edu 1612771Sqtt2@cornell.edu .align 2 1712771Sqtt2@cornell.edu .option norvc 1812771Sqtt2@cornell.edu 1912771Sqtt2@cornell.edu la s0, data 2012771Sqtt2@cornell.edu 2112771Sqtt2@cornell.edu # indicate it's a load test 2212771Sqtt2@cornell.edu li s1, CAUSE_MISALIGNED_LOAD 2312771Sqtt2@cornell.edu 2412771Sqtt2@cornell.edu#define SEXT(x, n) ((-((x) >> ((n)-1)) << (n)) | ((x) & ((1 << (n))-1))) 2512771Sqtt2@cornell.edu 2612771Sqtt2@cornell.edu/* Check that a misaligned load either writes the correct value, or 2712771Sqtt2@cornell.edu takes an exception and performs no writeback. */ 2812771Sqtt2@cornell.edu#define MISALIGNED_LOAD_TEST(testnum, insn, base, offset, res) \ 2912771Sqtt2@cornell.edu li TESTNUM, testnum; \ 3012771Sqtt2@cornell.edu la t2, 1f; \ 3112771Sqtt2@cornell.edu addi t1, base, offset; \ 3212771Sqtt2@cornell.edu insn t1, offset(base); \ 3312771Sqtt2@cornell.edu li t2, res; \ 3412771Sqtt2@cornell.edu bne t1, t2, fail; \ 3512771Sqtt2@cornell.edu1: 3612771Sqtt2@cornell.edu 3712771Sqtt2@cornell.edu MISALIGNED_LOAD_TEST(2, lh, s0, 1, SEXT(0xbbcc, 16)) 3812771Sqtt2@cornell.edu MISALIGNED_LOAD_TEST(3, lhu, s0, 1, 0xbbcc) 3912771Sqtt2@cornell.edu MISALIGNED_LOAD_TEST(4, lw, s0, 1, SEXT(0x99aabbcc, 32)) 4012771Sqtt2@cornell.edu MISALIGNED_LOAD_TEST(5, lw, s0, 2, SEXT(0x8899aabb, 32)) 4112771Sqtt2@cornell.edu MISALIGNED_LOAD_TEST(6, lw, s0, 3, SEXT(0x778899aa, 32)) 4212771Sqtt2@cornell.edu 4312771Sqtt2@cornell.edu#if __riscv_xlen == 64 4412771Sqtt2@cornell.edu MISALIGNED_LOAD_TEST(7, lwu, s0, 1, 0x99aabbcc) 4512771Sqtt2@cornell.edu MISALIGNED_LOAD_TEST(8, lwu, s0, 2, 0x8899aabb) 4612771Sqtt2@cornell.edu MISALIGNED_LOAD_TEST(9, lwu, s0, 3, 0x778899aa) 4712771Sqtt2@cornell.edu 4812771Sqtt2@cornell.edu MISALIGNED_LOAD_TEST(10, ld, s0, 1, 0x5566778899aabbcc) 4912771Sqtt2@cornell.edu MISALIGNED_LOAD_TEST(11, ld, s0, 2, 0x445566778899aabb) 5012771Sqtt2@cornell.edu MISALIGNED_LOAD_TEST(12, ld, s0, 3, 0x33445566778899aa) 5112771Sqtt2@cornell.edu MISALIGNED_LOAD_TEST(13, ld, s0, 4, 0x2233445566778899) 5212771Sqtt2@cornell.edu MISALIGNED_LOAD_TEST(14, ld, s0, 5, 0x1122334455667788) 5312771Sqtt2@cornell.edu MISALIGNED_LOAD_TEST(15, ld, s0, 6, 0xee11223344556677) 5412771Sqtt2@cornell.edu MISALIGNED_LOAD_TEST(16, ld, s0, 7, 0xffee112233445566) 5512771Sqtt2@cornell.edu#endif 5612771Sqtt2@cornell.edu 5712771Sqtt2@cornell.edu # indicate it's a store test 5812771Sqtt2@cornell.edu li s1, CAUSE_MISALIGNED_STORE 5912771Sqtt2@cornell.edu 6012771Sqtt2@cornell.edu/* Check that a misaligned store has some effect and takes no exception, 6112771Sqtt2@cornell.edu or takes no effect and generates an exception. This is not very 6212771Sqtt2@cornell.edu thorough. */ 6312771Sqtt2@cornell.edu#define MISALIGNED_STORE_TEST(testnum, insn, base, offset, size) \ 6412771Sqtt2@cornell.edu li TESTNUM, testnum; \ 6512771Sqtt2@cornell.edu la t2, 1f; \ 6612771Sqtt2@cornell.edu addi t1, base, offset; \ 6712771Sqtt2@cornell.edu insn x0, offset(base); \ 6812771Sqtt2@cornell.edu lb t1, (offset - 1)(base); \ 6912771Sqtt2@cornell.edu beqz t1, fail; \ 7012771Sqtt2@cornell.edu lb t1, (offset + size)(base); \ 7112771Sqtt2@cornell.edu beqz t1, fail; \ 7212771Sqtt2@cornell.edu lb t1, (offset + 0)(base); \ 7312771Sqtt2@cornell.edu bnez t1, fail; \ 7412771Sqtt2@cornell.edu lb t1, (offset + size - 1)(base); \ 7512771Sqtt2@cornell.edu bnez t1, fail; \ 7612771Sqtt2@cornell.edu1: 7712771Sqtt2@cornell.edu 7812771Sqtt2@cornell.edu MISALIGNED_STORE_TEST(22, sh, s0, 1, 2) 7912771Sqtt2@cornell.edu MISALIGNED_STORE_TEST(23, sw, s0, 5, 4) 8012771Sqtt2@cornell.edu MISALIGNED_STORE_TEST(24, sw, s0, 10, 4) 8112771Sqtt2@cornell.edu MISALIGNED_STORE_TEST(25, sw, s0, 15, 4) 8212771Sqtt2@cornell.edu 8312771Sqtt2@cornell.edu#if __riscv_xlen == 64 8412771Sqtt2@cornell.edu MISALIGNED_STORE_TEST(26, sd, s0, 25, 8) 8512771Sqtt2@cornell.edu MISALIGNED_STORE_TEST(27, sd, s0, 34, 8) 8612771Sqtt2@cornell.edu MISALIGNED_STORE_TEST(28, sd, s0, 43, 8) 8712771Sqtt2@cornell.edu MISALIGNED_STORE_TEST(29, sd, s0, 52, 8) 8812771Sqtt2@cornell.edu MISALIGNED_STORE_TEST(30, sd, s0, 61, 8) 8912771Sqtt2@cornell.edu MISALIGNED_STORE_TEST(31, sd, s0, 70, 8) 9012771Sqtt2@cornell.edu MISALIGNED_STORE_TEST(32, sd, s0, 79, 8) 9112771Sqtt2@cornell.edu#endif 9212771Sqtt2@cornell.edu 9312771Sqtt2@cornell.edu TEST_PASSFAIL 9412771Sqtt2@cornell.edu 9512771Sqtt2@cornell.edu .align 3 9612771Sqtt2@cornell.edu .global mtvec_handler 9712771Sqtt2@cornell.edumtvec_handler: 9812771Sqtt2@cornell.edu csrr t0, mcause 9912771Sqtt2@cornell.edu bne t0, s1, fail 10012771Sqtt2@cornell.edu 10112771Sqtt2@cornell.edu csrr t0, mbadaddr 10212771Sqtt2@cornell.edu bne t0, t1, fail 10312771Sqtt2@cornell.edu 10412771Sqtt2@cornell.edu lb t0, (t0) 10512771Sqtt2@cornell.edu beqz t0, fail 10612771Sqtt2@cornell.edu 10712771Sqtt2@cornell.edu csrw mepc, t2 10812771Sqtt2@cornell.edu mret 10912771Sqtt2@cornell.edu 11012771Sqtt2@cornell.eduRVTEST_CODE_END 11112771Sqtt2@cornell.edu 11212771Sqtt2@cornell.edu .data 11312771Sqtt2@cornell.eduRVTEST_DATA_BEGIN 11412771Sqtt2@cornell.edu 11512771Sqtt2@cornell.edudata: 11612771Sqtt2@cornell.edu .align 3 11712771Sqtt2@cornell.edu.word 0xaabbccdd 11812771Sqtt2@cornell.edu.word 0x66778899 11912771Sqtt2@cornell.edu.word 0x22334455 12012771Sqtt2@cornell.edu.word 0xeeffee11 12112771Sqtt2@cornell.edu.fill 0xff, 1, 80 12212771Sqtt2@cornell.edu 12312771Sqtt2@cornell.edu 12412771Sqtt2@cornell.edu TEST_DATA 12512771Sqtt2@cornell.edu 12612771Sqtt2@cornell.eduRVTEST_DATA_END 127