Searched refs:io (Results 1 - 24 of 24) sorted by relevance

/gem5/src/proto/
H A Dprotoio.hh49 #include <google/protobuf/io/coded_stream.h>
50 #include <google/protobuf/io/gzip_stream.h>
51 #include <google/protobuf/io/zero_copy_stream_impl.h>
125 google::protobuf::io::OstreamOutputStream* wrappedFileStream;
128 google::protobuf::io::GzipOutputStream* gzipStream;
131 google::protobuf::io::ZeroCopyOutputStream* zeroCopyStream;
196 google::protobuf::io::IstreamInputStream* wrappedFileStream;
199 google::protobuf::io::GzipInputStream* gzipStream;
202 google::protobuf::io::ZeroCopyInputStream* zeroCopyStream;
H A Dprotoio.cc57 wrappedFileStream = new io::OstreamOutputStream(&fileStream);
60 gzipStream = new io::GzipOutputStream(wrappedFileStream);
67 io::CodedOutputStream codedStream(zeroCopyStream);
89 io::CodedOutputStream codedStream(zeroCopyStream);
128 wrappedFileStream = new io::IstreamInputStream(&fileStream);
130 gzipStream = new io::GzipInputStream(wrappedFileStream);
137 io::CodedInputStream codedStream(zeroCopyStream);
186 io::CodedInputStream codedStream(zeroCopyStream);
188 io::CodedInputStream::Limit limit = codedStream.PushLimit(size);
/gem5/src/dev/alpha/
H A Dtsunami.cc64 alphaSystem->setIntrFreq(io->frequency());
70 io->postPIC(0x10);
76 io->clearPIC(0x10);
H A Dtsunami.hh66 TsunamiIO *io; member in class:Tsunami
H A DTsunami.py101 io = TsunamiIO(pio_addr=0x801fc000000) variable in class:Tsunami
131 self.io.pio = bus.master
H A Dtsunami_io.cc77 tsunami->io = this;
97 DPRINTF(Tsunami, "io read va=%#x size=%d IOPorrt=%#x\n", pkt->getAddr(),
159 DPRINTF(Tsunami, "io write - va=%#x size=%d IOPort=%#x Data=%#x\n",
H A Dbackdoor.cc99 alphaAccess->intrClockFrequency = tsunami->io->frequency();
/gem5/src/dev/mips/
H A Dmalta.cc62 io->postIntr(0x10/*HW4*/);
69 io->clearIntr(0x10/*HW4*/);
H A DMalta.py57 io = MaltaIO(pio_addr=0x801fc000000) variable in class:Malta
65 self.io.pio = bus.master
H A Dmalta.hh66 MaltaIO *io; member in class:Malta
H A Dmalta_io.cc71 malta->io = this;
/gem5/ext/mcpat/cacti/
H A Dcacti.mk27 SRCS = area.cc bank.cc mat.cc main.cc Ucache.cc io.cc technology.cc basic_circuit.cc parameter.cc \
/gem5/src/cpu/kvm/
H A Dx86_cpu.cc1283 const uint16_t port(kvm_run.io.port);
1287 if (kvm_run.io.size != 4) {
1289 kvm_run.io.size, port);
1292 if (kvm_run.io.count != 1) {
1294 kvm_run.io.count, port);
1297 uint32_t *data((uint32_t *)getGuestData(kvm_run.io.data_offset));
1298 if (kvm_run.io.direction == KVM_EXIT_IO_OUT)
1308 bool isWrite(kvm_run.io.direction == KVM_EXIT_IO_OUT);
1309 unsigned char *guestData(getGuestData(kvm_run.io.data_offset));
1311 uint16_t port(kvm_run.io
[all...]
H A Dbase.cc1071 _kvmRun->io.direction, _kvmRun->io.size,
1072 _kvmRun->io.port, _kvmRun->io.count);
/gem5/src/arch/mips/
H A Ddt_constants.hh77 Bitfield<26> io; member in namespace:MipsISA
/gem5/util/ccdrv/
H A Ddevtime.c31 #include <asm/io.h>
/gem5/ext/mcpat/
H A Dmcpat.mk49 io.cc \
/gem5/ext/googletest/googletest/src/
H A Dgtest-filepath.cc42 # include <io.h>
H A Dgtest-port.cc42 # include <io.h>
H A Dgtest.cc90 # include <io.h> // NOLINT
/gem5/ext/pybind11/tests/
H A Dtest_iostream.py8 from io import StringIO
/gem5/ext/ply/test/
H A Dtestyacc.py7 import io as StringIO
H A Dtestlex.py7 import io as StringIO
/gem5/ext/googletest/googletest/include/gtest/internal/
H A Dgtest-port.h396 # include <io.h>

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