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13232:0e63107dae56 |
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12-Oct-2018 |
Gabe Black <gabeblack@google.com> |
alpha: Use little endian packet accessors.
We know data is little endian, so we can use those accessors explicitly.
Change-Id: Ieb9c1eb8a4fec31ee69cbbfd8c1afdf9f64de366 Reviewed-on: https://gem5-review.googlesource.com/c/13459 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
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12239:ae1686aaebc5 |
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20-Jul-2017 |
Andreas Sandberg <andreas.sandberg@arm.com> |
dev: Move generic serial devices to src/dev/serial
Change-Id: I104227fc460f8b561e7375b329a541c1fce881b2 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/4291 Reviewed-by: Gabe Black <gabeblack@google.com>
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12237:fdd8c4c63356 |
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20-Jul-2017 |
Andreas Sandberg <andreas.sandberg@arm.com> |
dev: Refactor UART->Terminal interface
The UART models currently assume that they are always wired to a terminal. While true at the moment, this isn't necessarily a valid assumption. This change introduces the SerialDevice class that defines the interface for serial devices. Currently, Terminal is the only class that implements this interface.
Change-Id: I74fefafbbaf5ac1ec0d4ec0b5a0f4b246fdad305 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/4289 Reviewed-by: Gabe Black <gabeblack@google.com>
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11793:ef606668d247 |
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09-Nov-2016 |
Brandon Potter <brandon.potter@amd.com> |
style: [patch 1/22] use /r/3648/ to reorganize includes
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11264:dc389d2d2f79 |
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10-Dec-2015 |
Andreas Sandberg <andreas.sandberg@arm.com> |
dev: Move storage devices to src/dev/storage/
Move the IDE controller and the disk implementations to src/dev/storage.
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10905:a6ca6831e775 |
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07-Jul-2015 |
Andreas Sandberg <andreas.sandberg@arm.com> |
sim: Refactor the serialization base class
Objects that are can be serialized are supposed to inherit from the Serializable class. This class is meant to provide a unified API for such objects. However, so far it has mainly been used by SimObjects due to some fundamental design limitations. This changeset redesigns to the serialization interface to make it more generic and hide the underlying checkpoint storage. Specifically:
* Add a set of APIs to serialize into a subsection of the current object. Previously, objects that needed this functionality would use ad-hoc solutions using nameOut() and section name generation. In the new world, an object that implements the interface has the methods serializeSection() and unserializeSection() that serialize into a named /subsection/ of the current object. Calling serialize() serializes an object into the current section.
* Move the name() method from Serializable to SimObject as it is no longer needed for serialization. The fully qualified section name is generated by the main serialization code on the fly as objects serialize sub-objects.
* Add a scoped ScopedCheckpointSection helper class. Some objects need to serialize data structures, that are not deriving from Serializable, into subsections. Previously, this was done using nameOut() and manual section name generation. To simplify this, this changeset introduces a ScopedCheckpointSection() helper class. When this class is instantiated, it adds a new /subsection/ and subsequent serialization calls during the lifetime of this helper class happen inside this section (or a subsection in case of nested sections).
* The serialize() call is now const which prevents accidental state manipulation during serialization. Objects that rely on modifying state can use the serializeOld() call instead. The default implementation simply calls serialize(). Note: The old-style calls need to be explicitly called using the serializeOld()/serializeSectionOld() style APIs. These are used by default when serializing SimObjects.
* Both the input and output checkpoints now use their own named types. This hides underlying checkpoint implementation from objects that need checkpointing and makes it easier to change the underlying checkpoint storage code.
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10565:23593fdaadcd |
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02-Dec-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
mem: Remove redundant Packet::allocate calls
This patch cleans up the packet memory allocation confusion. The data is always allocated at the requesting side, when a packet is created (or copied), and there is never a need for any device to allocate any space if it is merely responding to a paket. This behaviour is in line with how SystemC and TLM works as well, thus increasing interoperability, and matching established conventions.
The redundant calls to Packet::allocate are removed, and the checks in the function are tightened up to make sure data is only ever allocated once. There are still some oddities in the packet copy constructor where we copy the data pointer if it is static (without ownership), and allocate new space if the data is dynamic (with ownership). The latter is being worked on further in a follow-on patch.
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9808:13ffc0066b76 |
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11-Jul-2013 |
Steve Reinhardt <stever@gmail.com> |
dev: make BasicPioDevice take size in constructor
Instead of relying on derived classes explicitly assigning to the BasicPioDevice pioSize field, require them to pass a size value in to the constructor.
Committed by: Nilay Vaish <nilay@cs.wisc.edu>
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8931:7a1dfb191e3f |
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06-Apr-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
MEM: Enable multiple distributed generalized memories
This patch removes the assumption on having on single instance of PhysicalMemory, and enables a distributed memory where the individual memories in the system are each responsible for a single contiguous address range.
All memories inherit from an AbstractMemory that encompasses the basic behaviuor of a random access memory, and provides untimed access methods. What was previously called PhysicalMemory is now SimpleMemory, and a subclass of AbstractMemory. All future types of memory controllers should inherit from AbstractMemory.
To enable e.g. the atomic CPU and RubyPort to access the now distributed memory, the system has a wrapper class, called PhysicalMemory that is aware of all the memories in the system and their associated address ranges. This class thus acts as an infinitely-fast bus and performs address decoding for these "shortcut" accesses. Each memory can specify that it should not be part of the global address map (used e.g. by the functional memories by some testers). Moreover, each memory can be configured to be reported to the OS configuration table, useful for populating ATAG structures, and any potential ACPI tables.
Checkpointing support currently assumes that all memories have the same size and organisation when creating and resuming from the checkpoint. A future patch will enable a more flexible re-organisation.
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8806:669e93d79ed9 |
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29-Jan-2012 |
Gabe Black <gblack@eecs.umich.edu> |
Implement Ali's review feedback.
Try to decrease indentation, and remove some redundant FullSystem checks.
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8789:a8b63a0ee14c |
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13-Nov-2011 |
Gabe Black <gblack@eecs.umich.edu> |
SE/FS: Get rid of FULL_SYSTEM in dev.
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8741:491297d019f3 |
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30-Sep-2011 |
Gabe Black <gblack@eecs.umich.edu> |
SE/FS: Remove System::platform and Platform::intrFrequency.
In order for a system object to work in SE mode and FS mode, it has to either always require a platform object even in SE mode, or get rid of the requirement all together. Making SE mode carry around unnecessary/unused bits of FS seems less than ideal, so I decided to go with the second option. The platform pointer in the System class was used for exactly one purpose, a path for the Alpha Linux system object to get to the real time clock and read its frequency so that it could short cut the loops_per_jiffy calculation. There was also a copy and pasted implementation in MIPS, but since it was only there because it was there in Alpha I still count that as one use.
This change reverses the mechanism that communicates the RTC frequency so that the Tsunami platform object pushes it up to the AlphaSystem object. This is slightly less specific than it could be because really only the AlphaLinuxSystem uses it. Because the intrFrequency function on the Platform class was no longer necessary (and unimplemented on anything but Alpha) it was eliminated.
After this change, a platform will need to have a system, but a system won't have to have a platform.
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8739:925f15f96322 |
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30-Sep-2011 |
Gabe Black <gblack@eecs.umich.edu> |
SE/FS: Build the devices in SE mode.
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8232:b28d06a175be |
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15-Apr-2011 |
Nathan Binkert <nate@binkert.org> |
trace: reimplement the DTRACE function so it doesn't use a vector At the same time, rename the trace flags to debug flags since they have broader usage than simply tracing. This means that --trace-flags is now --debug-flags and --trace-help is now --debug-help
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7823:dac01f14f20f |
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08-Jan-2011 |
Steve Reinhardt <steve.reinhardt@amd.com> |
Replace curTick global variable with accessor functions. This step makes it easy to replace the accessor functions (which still access a global variable) with ones that access per-thread curTick values.
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7446:f056e1b65c13 |
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03-Jun-2010 |
Steve Reinhardt <steve.reinhardt@amd.com> |
Act like enabling CPUs is no big deal, rather than a scary thing that might not work.
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5714:76abee886def |
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02-Nov-2008 |
Lisa Hsu <hsul@eecs.umich.edu> |
Add in Context IDs to the simulator. From now on, cpuId is almost never used, the primary identifier for a hardware context should be contextId(). The concept of threads within a CPU remains, in the form of threadId() because sometimes you need to know which context within a cpu to manipulate.
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5480:b9460d7f74f0 |
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17-Jun-2008 |
Nathan Binkert <nate@binkert.org> |
rename AlphaConsole to AlphaBackdoor
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