| /gem5/src/cpu/o3/ |
| H A D | rename_map.cc | 56 : freeList(NULL), zeroReg(IntRegClass,0)
65 assert(freeList == NULL);
69 freeList = _freeList;
93 renamed_reg = freeList->getReg();
115 UnifiedFreeList *freeList,
121 intMap.init(TheISA::NumIntRegs, &(freeList->intList), _intZeroReg);
123 floatMap.init(TheISA::NumFloatRegs, &(freeList->floatList), _floatZeroReg);
125 vecMap.init(TheISA::NumVecRegs, &(freeList->vecList), (RegIndex)-1);
128 &(freeList->vecElemList), (RegIndex)-1);
130 predMap.init(TheISA::NumVecPredRegs, &(freeList
112 init(PhysRegFile *_regFile, RegIndex _intZeroReg, RegIndex _floatZeroReg, UnifiedFreeList *freeList, VecMode _mode) argument
137 switchFreeList(UnifiedFreeList* freeList) argument
[all...] |
| H A D | regfile.cc | 135 PhysRegFile::initFreeList(UnifiedFreeList *freeList) argument
144 freeList->addRegs(intRegIds.begin(), intRegIds.end());
151 freeList->addRegs(floatRegIds.begin(), floatRegIds.end());
168 freeList->addRegs(vecRegIds.begin(), vecRegIds.end());
170 freeList->addRegs(vecElemIds.begin(), vecElemIds.end());
177 freeList->addRegs(vecPredRegIds.begin(), vecPredRegIds.end());
184 freeList->addRegs(ccRegIds.begin(), ccRegIds.end());
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| H A D | rename_map.hh | 81 SimpleFreeList *freeList; member in class:SimpleRenameMap
146 unsigned numFreeEntries() const { return freeList->numFreeRegs(); }
218 UnifiedFreeList *freeList,
402 * Switch freeList of registers from Full to Elem or vicevers
405 void switchFreeList(UnifiedFreeList* freeList);
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| H A D | cpu.cc | 122 freeList(name() + ".freelist", ®File),
234 &freeList,
238 &freeList, vecMode);
247 PhysRegIdPtr phys_reg = freeList.getIntReg();
253 PhysRegIdPtr phys_reg = freeList.getFloatReg();
266 PhysRegIdPtr phys_reg = freeList.getVecReg();
276 PhysRegIdPtr phys_elem = freeList.getVecElem();
284 PhysRegIdPtr phys_reg = freeList.getVecPredReg();
291 PhysRegIdPtr phys_reg = freeList.getCCReg();
299 rename.setFreeList(&freeList);
[all...] |
| H A D | rename.hh | 365 FreeList *freeList; member in class:DefaultRename
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| H A D | rename_impl.hh | 329 freeList = fl_ptr;
995 freeList->addReg(hb_it->newPhysReg);
1010 cpu->switchRenameMode(tid, freeList);
1055 freeList->addReg(hb_it->prevPhysReg);
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| H A D | regfile.hh | 157 void initFreeList(UnifiedFreeList *freeList);
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| H A D | cpu.hh | 581 typename CPUPolicy::FreeList freeList; member in class:FullO3CPU
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| /gem5/src/mem/cache/ |
| H A D | write_queue.cc | 64 assert(!freeList.empty());
65 WriteQueueEntry *entry = freeList.front();
67 freeList.pop_front();
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| H A D | mshr_queue.cc | 64 assert(!freeList.empty());
65 MSHR *mshr = freeList.front();
67 freeList.pop_front();
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| H A D | queue.hh | 102 typename Entry::List freeList; member in class:Queue
139 freeList.push_back(&entries[i]);
241 freeList.push_front(entry);
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| /gem5/src/arch/x86/ |
| H A D | tlb.cc | 71 freeList.push_back(&tlb[x]);
93 freeList.push_back(&tlb[lru]);
106 if (freeList.empty())
109 newEntry = freeList.front();
110 freeList.pop_front();
137 freeList.push_back(&tlb[i]);
156 freeList.push_back(&tlb[i]);
168 freeList.push_back(entry);
483 uint32_t _size = size - freeList.size();
507 TlbEntry *newEntry = freeList
[all...] |
| H A D | tlb.hh | 98 EntryList freeList; member in class:X86ISA::TLB
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| /gem5/src/arch/sparc/ |
| H A D | tlb.cc | 67 freeList.push_back(&tlb[x]);
127 freeList.push_front(&tlb[x]);
144 if (!freeList.empty()) {
145 new_entry = freeList.front();
166 freeList.remove(new_entry);
282 freeList.push_front(i->second);
297 freeList.push_front(&tlb[x]);
317 freeList.push_front(&tlb[x]);
336 freeList.push_back(&tlb[x]);
551 if (lookupTable.size() != 64 - freeList
[all...] |
| H A D | tlb.hh | 84 std::list<TlbEntry*> freeList; member in class:SparcISA::TLB
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| /gem5/src/gpu-compute/ |
| H A D | gpu_tlb.cc | 79 freeList.resize(numSets);
85 freeList[set].push_back(&tlb.at(x));
167 if (!freeList[set].empty()) {
168 newEntry = freeList[set].front();
169 freeList[set].pop_front();
234 freeList[i].push_back(entry);
254 freeList[i].push_back(*entryIt);
271 freeList[set].push_back(*entry);
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| H A D | gpu_tlb.hh | 167 * the freeList.
169 std::vector<EntryList> freeList; member in class:X86ISA::GpuTLB
174 * contains the MRU TLB entry of the given set. If the freeList
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