/gem5/src/dev/arm/ |
H A D | amba_fake.cc | 60 Addr daddr = pkt->getAddr() - pioAddr; local 62 DPRINTF(AMBA, " read register %#x\n", daddr); 66 panic("Tried to read AmbaFake at offset %#x that doesn't exist\n", daddr); 76 Addr daddr = pkt->getAddr() - pioAddr; local 79 panic("Tried to write AmbaFake at offset %#x that doesn't exist\n", daddr);
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H A D | a9scu.cc | 58 Addr daddr = pkt->getAddr() - pioAddr; local 60 switch(daddr) { 82 panic("Tried to read SCU at offset %#x\n", daddr); 95 Addr daddr = pkt->getAddr() - pioAddr; local 96 switch (daddr) { 99 warn("Tried to write SCU at offset %#x\n", daddr);
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H A D | timer_sp804.cc | 70 Addr daddr = pkt->getAddr() - pioAddr; local 71 DPRINTF(Timer, "Reading from DualTimer at offset: %#x\n", daddr); 73 if (daddr < Timer::Size) 74 timer0.read(pkt, daddr); 75 else if ((daddr - Timer::Size) < Timer::Size) 76 timer1.read(pkt, daddr - Timer::Size); 78 panic("Tried to read SP804 at offset %#x that doesn't exist\n", daddr); 85 Sp804::Timer::read(PacketPtr pkt, Addr daddr) argument 87 switch(daddr) { 113 panic("Tried to read SP804 timer at offset %#x\n", daddr); 125 Addr daddr = pkt->getAddr() - pioAddr; local 139 write(PacketPtr pkt, Addr daddr) argument [all...] |
H A D | timer_a9global.cc | 70 Addr daddr = pkt->getAddr() - pioAddr; local 72 if (daddr < Timer::Size) 73 global_timer.read(pkt, daddr); 76 daddr); 88 A9GlobalTimer::Timer::read(PacketPtr pkt, Addr daddr) argument 90 DPRINTF(Timer, "Reading from A9GlobalTimer at offset: %#x\n", daddr); 93 switch(daddr) { 138 panic("Tried to read A9GlobalTimer at offset %#x\n", daddr); 142 pkt->getLE<uint32_t>(), daddr); 150 Addr daddr local 165 write(PacketPtr pkt, Addr daddr) argument [all...] |
H A D | gic_v2.cc | 142 const Addr daddr = pkt->getAddr() - distRange.start(); local 145 DPRINTF(GIC, "gic distributor read register %#x\n", daddr); 147 const uint32_t resp = readDistributor(ctx, daddr, pkt->getSize()); 169 GicV2::readDistributor(ContextID ctx, Addr daddr, size_t resp_sz) argument 171 if (GICD_IGROUPR.contains(daddr)) { 172 uint32_t ix = (daddr - GICD_IGROUPR.start()) >> 2; 177 if (GICD_ISENABLER.contains(daddr)) { 178 uint32_t ix = (daddr - GICD_ISENABLER.start()) >> 2; 183 if (GICD_ICENABLER.contains(daddr)) { 184 uint32_t ix = (daddr [all...] |
H A D | amba_device.cc | 76 Addr daddr = pkt->getAddr() - pio_addr; local 77 if (daddr < AMBA_PER_ID0 || daddr > AMBA_CEL_ID3) 80 int byte = (daddr - AMBA_PER_ID0) << 1;
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H A D | gic_v3.cc | 109 const Addr daddr = addr - distRange.start(); local 111 resp = distributor->read(daddr, size, is_secure_access); 115 pkt->req->contextId(), daddr, size, is_secure_access, resp); 117 Addr daddr = (addr - redistRange.start()) % redistSize; local 120 resp = redist->read(daddr, size, is_secure_access); 125 redist->processorNumber(), pkt->req->contextId(), daddr, size, 146 const Addr daddr = addr - distRange.start(); local 150 pkt->req->contextId(), daddr, size, is_secure_access, data); 151 distributor->write(daddr, data, size, is_secure_access); 154 Addr daddr local 234 const Addr daddr = addr - redistRange.start(); local [all...] |
H A D | timer_cpulocal.cc | 96 Addr daddr = pkt->getAddr() - pioAddr; local 98 DPRINTF(Timer, "Reading from CpuLocalTimer at offset: %#x\n", daddr); 102 if (daddr < Timer::Size) 103 localTimer[cpu_id]->read(pkt, daddr); 105 panic("Tried to read CpuLocalTimer at offset %#x that doesn't exist\n", daddr); 112 CpuLocalTimer::Timer::read(PacketPtr pkt, Addr daddr) argument 114 DPRINTF(Timer, "Reading from CpuLocalTimer at offset: %#x\n", daddr); 117 switch(daddr) { 164 panic("Tried to read CpuLocalTimer at offset %#x\n", daddr); 174 Addr daddr local 189 write(PacketPtr pkt, Addr daddr) argument [all...] |
H A D | energy_ctrl.cc | 69 Addr daddr = pkt->getAddr() - pioAddr; local 70 assert((daddr & 3) == 0); 71 Registers reg = Registers(daddr / 4); 141 panic("Tried to read EnergyCtrl at offset %#x / reg %i\n", daddr, 158 Addr daddr = pkt->getAddr() - pioAddr; local 159 assert((daddr & 3) == 0); 160 Registers reg = Registers(daddr / 4); 211 panic("Tried to write EnergyCtrl at offset %#x\n", daddr);
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H A D | rtc_pl031.cc | 65 Addr daddr = pkt->getAddr() - pioAddr; local 68 DPRINTF(Timer, "Reading from RTC at offset: %#x\n", daddr); 70 switch (daddr) { 98 panic("Tried to read PL031 at offset %#x that doesn't exist\n", daddr); 127 Addr daddr = pkt->getAddr() - pioAddr; local 128 DPRINTF(Timer, "Writing to RTC at offset: %#x\n", daddr); 130 switch (daddr) { 157 panic("Tried to read PL031 at offset %#x that doesn't exist\n", daddr);
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H A D | base_gic.hh | 118 virtual uint32_t readDistributor(ContextID ctx, Addr daddr) = 0; 119 virtual uint32_t readCpu(ContextID ctx, Addr daddr) = 0; 121 virtual void writeDistributor(ContextID ctx, Addr daddr, 123 virtual void writeCpu(ContextID ctx, Addr daddr, uint32_t data) = 0;
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H A D | pl111.cc | 111 Addr daddr = pkt->getAddr() - pioAddr; local 113 DPRINTF(PL111, " read register %#x size=%d\n", daddr, pkt->getSize()); 115 switch (daddr) { 147 panic("LCD register at offset %#x is Write-Only\n", daddr); 177 panic("CLCD register at offset %#x is Write-Only\n", daddr); 190 } else if (daddr >= CrsrImage && daddr <= 0xBFC) { 193 index = (daddr - CrsrImage) >> 2; 196 } else if (daddr >= LcdPalette && daddr < 255 Addr daddr = pkt->getAddr() - pioAddr; local [all...] |
H A D | kmi.cc | 67 Addr daddr = pkt->getAddr() - pioAddr; local 71 switch (daddr) { 105 warn("Tried to read PL050 at offset %#x that doesn't exist\n", daddr); 120 Addr daddr = pkt->getAddr() - pioAddr; local 126 daddr, data, pkt->getSize()); 128 switch (daddr) { 150 warn("PL050: Unhandled write of %#x to offset %#x\n", data, daddr);
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H A D | vgic.cc | 99 Addr daddr = pkt->getAddr() - vcpuAddr; local 105 DPRINTF(VGIC, "VGIC VCPU read register %#x\n", daddr); 107 switch (daddr) { 134 panic("VGIC VCPU read of bad address %#x\n", daddr); 146 Addr daddr = pkt->getAddr() - hvAddr; 150 DPRINTF(VGIC, "VGIC HVCtrl read register %#x\n", daddr); 155 if (daddr & ~0x1ff) { 156 ctx_id = (daddr >> 9); 158 panic("VGIC: Weird unbanked hv ctrl address %#x!\n", daddr); 159 daddr [all...] |
H A D | timer_a9global.hh | 132 void read(PacketPtr pkt, Addr daddr); 135 void write(PacketPtr pkt, Addr daddr);
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H A D | timer_sp804.hh | 119 void read(PacketPtr pkt, Addr daddr); 122 void write(PacketPtr pkt, Addr daddr);
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H A D | pl011.cc | 71 Addr daddr = pkt->getAddr() - pioAddr; local 73 DPRINTF(Uart, " read register %#x size=%d\n", daddr, pkt->getSize()); 80 switch(daddr) { 147 panic("Tried to read PL011 at offset %#x that doesn't exist\n", daddr); 177 Addr daddr = pkt->getAddr() - pioAddr; local 179 DPRINTF(Uart, " write register %#x value %#x size=%d\n", daddr, 203 switch (daddr) { 255 panic("Tried to write PL011 at offset %#x that doesn't exist\n", daddr);
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H A D | timer_cpulocal.hh | 144 void read(PacketPtr pkt, Addr daddr); 147 void write(PacketPtr pkt, Addr daddr);
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H A D | gic_v2.hh | 480 uint32_t readDistributor(ContextID ctx, Addr daddr, 482 uint32_t readDistributor(ContextID ctx, Addr daddr) override { 483 return readDistributor(ctx, daddr, 4); 490 uint32_t readCpu(ContextID ctx, Addr daddr) override; 496 void writeDistributor(ContextID ctx, Addr daddr, 498 void writeDistributor(ContextID ctx, Addr daddr, 500 return writeDistributor(ctx, daddr, data, 4); 507 void writeCpu(ContextID ctx, Addr daddr, uint32_t data) override;
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/gem5/src/arch/arm/kvm/ |
H A D | gic.hh | 121 uint32_t readDistributor(ContextID ctx, Addr daddr) override; 122 uint32_t readCpu(ContextID ctx, Addr daddr) override; 124 void writeDistributor(ContextID ctx, Addr daddr, 126 void writeCpu(ContextID ctx, Addr daddr, uint32_t data) override; 212 ContextID ctx, Addr daddr); 214 ContextID ctx, Addr daddr); 217 Addr daddr, size_t size); 219 Addr daddr, size_t size); 221 Addr daddr, size_t size); 223 Addr daddr, size_ [all...] |
H A D | gic.cc | 141 KvmKernelGicV2::readDistributor(ContextID ctx, Addr daddr) argument 144 return getGicReg(KVM_DEV_ARM_VGIC_GRP_DIST_REGS, vcpu, daddr); 148 KvmKernelGicV2::readCpu(ContextID ctx, Addr daddr) argument 151 return getGicReg(KVM_DEV_ARM_VGIC_GRP_CPU_REGS, vcpu, daddr); 155 KvmKernelGicV2::writeDistributor(ContextID ctx, Addr daddr, uint32_t data) argument 158 setGicReg(KVM_DEV_ARM_VGIC_GRP_DIST_REGS, vcpu, daddr, data); 162 KvmKernelGicV2::writeCpu(ContextID ctx, Addr daddr, uint32_t data) argument 165 setGicReg(KVM_DEV_ARM_VGIC_GRP_CPU_REGS, vcpu, daddr, data); 288 ContextID ctx, Addr daddr) 290 auto val = from->readDistributor(ctx, daddr); 287 copyDistRegister(BaseGicRegisters* from, BaseGicRegisters* to, ContextID ctx, Addr daddr) argument 296 copyCpuRegister(BaseGicRegisters* from, BaseGicRegisters* to, ContextID ctx, Addr daddr) argument 305 copyBankedDistRange(BaseGicRegisters* from, BaseGicRegisters* to, Addr daddr, size_t size) argument 314 clearBankedDistRange(BaseGicRegisters* to, Addr daddr, size_t size) argument 323 copyDistRange(BaseGicRegisters* from, BaseGicRegisters* to, Addr daddr, size_t size) argument 331 clearDistRange(BaseGicRegisters* to, Addr daddr, size_t size) argument [all...] |
/gem5/src/dev/i2c/ |
H A D | bus.cc | 176 Addr daddr = pkt->getAddr() - pioAddr; local 178 switch (daddr) { 196 Addr daddr = pkt->getAddr() - pioAddr; local 197 return daddr == SB_CONTROLS && (msg & 1); 204 Addr daddr = pkt->getAddr() - pioAddr; local 205 return scl && (msg & 2) && daddr == SB_CONTROLC; 212 Addr daddr = pkt->getAddr() - pioAddr; local 213 return scl && (msg & 2) && daddr == SB_CONTROLS;
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/gem5/src/dev/pci/ |
H A D | copy_engine.cc | 172 Addr daddr; local 174 if (!getBAR(pkt->getAddr(), bar, daddr)) 186 DPRINTF(DMACopyEngine, "Read device register %#X size: %d\n", daddr, size); 192 if (daddr < 0x80) { 193 switch (daddr) { 213 panic("Read request to unknown register number: %#x\n", daddr); 222 daddr -= 0x80; 223 while (daddr >= 0x80) { 225 daddr -= 0x80; 235 chan[chanid]->channelRead(pkt, daddr, siz 242 channelRead(Packet *pkt, Addr daddr, int size) argument 295 Addr daddr; local 370 channelWrite(Packet *pkt, Addr daddr, int size) argument [all...] |
/gem5/src/dev/alpha/ |
H A D | backdoor.cc | 113 Addr daddr = pkt->getAddr() - pioAddr; local 120 switch (daddr) 140 DPRINTF(AlphaBackdoor, "read: offset=%#x val=%#x\n", daddr, 144 switch (daddr) 183 int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) / 189 panic("Unknown 64bit access, %#x\n", daddr); 191 DPRINTF(AlphaBackdoor, "read: offset=%#x val=%#x\n", daddr, 204 Addr daddr = pkt->getAddr() - pioAddr; local 209 switch (daddr) { 240 int cpunum = (daddr [all...] |
H A D | tsunami_io.cc | 95 Addr daddr = pkt->getAddr() - pioAddr; local 98 pkt->getSize(), daddr); 101 switch(daddr) { 141 if (daddr == TSDEV_PIC1_ISR) 157 Addr daddr = pkt->getAddr() - pioAddr; local 165 switch(daddr) {
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