Searched refs:offset (Results 176 - 189 of 189) sorted by relevance

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/gem5/src/arch/arm/linux/
H A Dprocess.cc1709 int offset = callnum - base; local
1710 if (offset < 0 || offset >= size)
1712 return &descs[offset];
/gem5/src/dev/net/
H A Dns_gige.cc155 int offset = pkt->getAddr() & PCI_CONFIG_SIZE; local
156 if (offset < PCI_DEVICE_SPECIFIC)
161 switch (offset) {
166 if (config.data[offset] & PCI_CMD_IOSE)
193 //The mask is to give you only the offset into the device register file
H A Di8254xGBe.cc153 int offset = pkt->getAddr() & PCI_CONFIG_SIZE; local
154 if (offset < PCI_DEVICE_SPECIFIC)
1276 "lpe: %d Packet Length: %d offset: %d srrctl: %#x "
1350 "stripcrc offset: %d value written: %d %d\n",
1734 DPRINTF(EthernetDesc, "Starting DMA of packet at offset %d\n", p->length);
1750 "Starting DMA of packet at offset %d length: %d\n",
/gem5/src/sim/
H A Dsyscall_emul.cc347 uint64_t offset = (offset_high << 32) | offset_low; local
349 uint64_t result = lseek(sim_fd, offset, whence);
734 * with dup. Really, it's difficult to maintain fields like file offset or
1131 off_t offset = p->getSyscallArg(tc, index); local
1139 int result = fallocate(sim_fd, mode, offset, len);
H A Dsyscall_emul.hh1747 int offset = p->getSyscallArg(tc, index); local
1750 offset *= TheISA::PageBytes;
1753 offset & (TheISA::PageBytes - 1) ||
1799 tgt_fd, offset);
1808 sim_fd, offset);
1873 // on the specified offset into the file.
1874 uint64_t size = std::min((uint64_t)file_stat.st_size - offset,
1923 int offset = p->getSyscallArg(tc, index); local
1933 int bytes_written = pwrite(sim_fd, bufArg.bufferPtr(), nbytes, offset);
/gem5/src/dev/arm/
H A Dgic_v3_its.hh169 Bitfield<19, 5> offset; variable
/gem5/src/arch/arm/
H A Dfaults.cc198 // Fields: name, offset, cur{ELT,ELH}Offset, lowerEL{64,32}Offset, next mode,
199 // {ARM, Thumb, ARM_ELR, Thumb_ELR} PC offset, hyp trap,
324 return base + offset(tc);
739 return base + offset(tc);
934 ArmFaultVals<T>::offset(ThreadContext *tc) function in class:ArmISA::ArmFaultVals
949 return isHypTrap ? 0x14 : vals.offset;
/gem5/src/cpu/trace/
H A Dtrace_cpu.cc129 // Set the trace offset as the minimum of that in both traces
131 inform("%s: Time offset (tick) found as min of both traces is %lli.\n",
134 // Schedule next icache and dcache event by subtracting the offset
138 // Adjust the trace offset for the dcache generator's ready nodes
335 TraceCPU::ElasticDataGen::adjustInitTraceOffset(Tick& offset) { argument
337 free_node.execTick -= offset;
/gem5/ext/systemc/src/sysc/qt/md/
H A Dksr1.s54 # Calls to those procedures branch to a 16 byte offset (4 instrs) in
179 # We jump to an offset of 16 to either (1) skip past the two noop pairs
/gem5/src/arch/x86/regs/
H A Dmisc.hh1026 Bitfield<31, 0> offset; // Target Code-Segment Offset member in namespace:X86ISA
/gem5/src/mem/cache/
H A Dbase.cc690 int offset = pkt->getOffset(blkSize); local
691 uint8_t *blk_data = blk->data + offset;
918 int offset = tags->extractBlkOffset(pkt->getAddr()); local
919 uint8_t *blk_data = blk->data + offset;
/gem5/src/arch/hsail/
H A DBrig_new.hpp1464 BrigUInt64 offset; //.acc=subItem<UInt64> //.wtype=UInt64 member in struct:BrigOperandAddress
/gem5/src/arch/x86/
H A Dprocess.cc516 PFGateHigh.offset = bits(PFHandlerVirtAddr, 63, 32);
/gem5/src/mem/
H A Ddram_ctrl.cc247 // timestamp offset should be in clock cycles for DRAMPower
640 unsigned offset = pkt->getAddr() & (burstSize - 1);
641 unsigned int dram_pkt_count = divCeil(offset + size, burstSize);

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