Searched refs:objects (Results 151 - 175 of 312) sorted by relevance

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/gem5/src/dev/alpha/
H A D	AlphaBackdoor.py	33 from m5.objects.Device import BasicPioDevice
H A D	Tsunami.py	31 from m5.objects.BadDevice import BadDevice 32 from m5.objects.AlphaBackdoor import AlphaBackdoor 33 from m5.objects.Device import BasicPioDevice, IsaFake, BadAddr 34 from m5.objects.PciHost import GenericPciHost 35 from m5.objects.Platform import Platform 36 from m5.objects.Uart import Uart8250
/gem5/src/dev/arm/
H A D	EnergyCtrl.py	42 from m5.objects.Device import BasicPioDevice
/gem5/src/mem/probes/
H A D	StackDistProbe.py	41 from m5.objects.BaseMemProbe import BaseMemProbe
/gem5/src/systemc/tests/
H A D	config.py	36 from m5.objects import SystemC_Kernel, Root
/gem5/src/cpu/testers/rubytest/
H A D	RubyTester.py	31 from m5.objects.ClockedObject import ClockedObject
/gem5/src/mem/
H A D	SerialLink.py	45 from m5.objects.ClockedObject import ClockedObject
/gem5/configs/common/
H A D	PlatformConfig.py	44 import m5.objects 70 return issubclass(cls, m5.objects.Platform) and \ 110 for name, cls in inspect.getmembers(m5.objects, is_platform_class):
/gem5/configs/example/arm/
H A D	fs_power.py	49 from m5.objects import MathExprPowerModel, PowerModel 107 if not isinstance(cpu, m5.objects.BaseCPU): 115 if not isinstance(l2, m5.objects.Cache):
/gem5/src/mem/ruby/network/simple/
H A D	SimpleNetwork.py	33 from m5.objects.Network import RubyNetwork 34 from m5.objects.BasicRouter import BasicRouter 35 from m5.objects.MessageBuffer import MessageBuffer
/gem5/src/mem/ruby/network/garnet2.0/
H A D	GarnetNetwork.py	33 from m5.objects.Network import RubyNetwork 34 from m5.objects.BasicRouter import BasicRouter 35 from m5.objects.ClockedObject import ClockedObject
/gem5/src/arch/arm/
H A D	ArmISA.py	43 from m5.objects.ArmPMU import ArmPMU 44 from m5.objects.ArmSystem import SveVectorLength 45 from m5.objects.ISACommon import VecRegRenameMode
/gem5/tests/configs/
H A D	o3-timing-ruby.py	30 from m5.objects import *
/gem5/src/systemc/tests/systemc/kernel/sc_process_handle/test01/
H A D	test01.cpp	73 const std::vector<sc_object*>& objects = m_a.get_child_objects(); local 74 if ( objects.size() != 0 ) 169 const std::vector<sc_object*>& objects = handle.get_child_objects(); local 170 if ( objects.size() != 0 )
/gem5/configs/topologies/
H A D	CrossbarGarnet.py	33 from m5.objects import *
/gem5/src/arch/alpha/
H A D	AlphaSystem.py	32 from m5.objects.System import System
/gem5/src/arch/arm/tracers/
H A D	TarmacTrace.py	41 from m5.objects.InstTracer import InstTracer
/gem5/src/cpu/trace/
H A D	TraceCPU.py	41 from m5.objects.BaseCPU import BaseCPU
/gem5/src/dev/pci/
H A D	CopyEngine.py	33 from m5.objects.PciDevice import PciDevice
/gem5/src/dev/virtio/
H A D	VirtIO9P.py	42 from m5.objects.VirtIO import VirtIODeviceBase
/gem5/src/mem/ruby/structures/
H A D	RubyPrefetcher.py	33 from m5.objects.System import System
/gem5/util/systemc/systemc_within_gem5/systemc_sc_main/
H A D	config.py	32 from m5.objects import SystemC_Kernel, Root 38 # systemc objects and needs to exist in simulations using systemc.
/gem5/src/cpu/testers/memtest/
H A D	MemTest.py	44 from m5.objects.ClockedObject import ClockedObject
/gem5/src/mem/ruby/slicc_interface/
H A D	Controller.py	44 from m5.objects.ClockedObject import ClockedObject
/gem5/src/arch/sparc/
H A D	SparcSystem.py	31 from m5.objects.SimpleMemory import SimpleMemory 32 from m5.objects.System import System

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Indexes created Thu Sep 26 06:36:22 EDT 2019