Searched refs:Addr (Results 326 - 350 of 767) sorted by relevance

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/gem5/src/arch/mips/
H A Dutility.hh97 inline Addr
98 TruncPage(Addr addr)
101 inline Addr
102 RoundPage(Addr addr)
/gem5/src/arch/x86/
H A Dtlb.hh74 TlbEntry *lookup(Addr va, bool update_lru = true);
80 EntryList::iterator lookupIt(Addr va, bool update_lru = true);
91 void demapPage(Addr va, uint64_t asn) override;
147 TlbEntry *insert(Addr vpn, const TlbEntry &entry);
H A Dsystem.cc128 const Addr PageMapLevel4 = 0x70000;
129 const Addr PageDirPtrTable = 0x71000;
130 const Addr PageDirTable[NumPDTs] =
132 const Addr GDTBase = 0x76000;
249 Addr base = 0;
250 const Addr pageSize = 2 << 20;
300 Addr ebdaPos = 0xF0000;
301 Addr fixed, table;
314 X86System::writeOutSMBiosTable(Addr header,
315 Addr
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H A Dpagetable.cc57 TlbEntry::TlbEntry(Addr asn, Addr _vaddr, Addr _paddr,
/gem5/src/dev/arm/
H A Dbase_gic.hh118 virtual uint32_t readDistributor(ContextID ctx, Addr daddr) = 0;
119 virtual uint32_t readCpu(ContextID ctx, Addr daddr) = 0;
121 virtual void writeDistributor(ContextID ctx, Addr daddr,
123 virtual void writeCpu(ContextID ctx, Addr daddr, uint32_t data) = 0;
H A Dvio_mmio.hh63 enum : Addr {
97 uint32_t read(Addr offset);
98 void write(Addr offset, uint32_t value);
/gem5/src/arch/arm/insts/
H A Dsve_mem.cc46 SveMemVecFillSpill::generateDisassembly(Addr pc,
62 SveMemPredFillSpill::generateDisassembly(Addr pc,
78 SveContigMemSS::generateDisassembly(Addr pc, const SymbolTable *symtab) const
97 SveContigMemSI::generateDisassembly(Addr pc, const SymbolTable *symtab) const
H A Dpseudo.hh63 Addr pc, const SymbolTable *symtab) const override;
89 Addr pc, const SymbolTable *symtab) const override;
119 Addr pc, const SymbolTable *symtab) const override;
H A Dmisc.hh56 Addr pc, const SymbolTable *symtab) const override;
83 Addr pc, const SymbolTable *symtab) const override;
97 Addr pc, const SymbolTable *symtab) const override;
116 Addr pc, const SymbolTable *symtab) const override;
135 Addr pc, const SymbolTable *symtab) const override;
149 Addr pc, const SymbolTable *symtab) const override;
164 Addr pc, const SymbolTable *symtab) const override;
179 Addr pc, const SymbolTable *symtab) const override;
196 Addr pc, const SymbolTable *symtab) const override;
215 Addr p
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/gem5/src/mem/cache/tags/
H A Dsector_blk.cc68 Addr
96 SectorSubBlk::insert(const Addr tag, const bool is_secure,
138 SectorBlk::setTag(const Addr tag)
143 Addr
/gem5/src/mem/ruby/structures/
H A DTimerTable.cc54 Addr
65 TimerTable::set(Addr address, Tick ready_time)
82 TimerTable::unset(Addr address)
/gem5/src/arch/sparc/insts/
H A Dbranch.hh54 Addr pc, const SymbolTable *symtab) const override;
69 Addr pc, const SymbolTable *symtab) const override;
116 Addr pc, const SymbolTable *symtab) const override;
/gem5/src/arch/arm/tracers/
H A Dtarmac_base.hh93 Addr addr;
117 MemEntry(uint8_t _size, Addr _addr, uint64_t _data);
120 Addr addr;
/gem5/src/base/
H A Daddr_range.test.cc97 virtual int getIndex(Addr addr) = 0;
101 for (Addr addr = start; addr <= end; addr++) {
112 Addr offsets[intlvSize] = {0, 0, 0, 0};
113 for (Addr addr = start; addr <= end; addr++) {
115 Addr offset = range[i].getOffset(addr);
119 for (Addr offset: offsets) {
124 static const Addr end = 0x1ffff;
125 static const Addr start = 0x0;
136 std::vector<Addr> masks = {
145 int getIndex(Addr add
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/gem5/src/cpu/pred/
H A Dsimple_indirect.cc92 SimpleIndirectPredictor::lookup(Addr br_addr, TheISA::PCState& target,
95 Addr set_index = getSetIndex(br_addr, threadInfo[tid].ghr, tid);
96 Addr tag = getTag(br_addr);
114 SimpleIndirectPredictor::recordIndirect(Addr br_addr, Addr tgt_addr,
187 Addr set_index = getSetIndex(hist_entry.pcAddr, *ghr, tid);
188 Addr tag = getTag(hist_entry.pcAddr);
213 inline Addr
214 SimpleIndirectPredictor::getSetIndex(Addr br_addr, unsigned ghr, ThreadID tid)
218 Addr has
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H A Dloop_predictor.hh150 int lindex(Addr pc_in, unsigned instShiftAmt) const;
173 bool getLoop(Addr pc, BranchInfo* bi, bool speculative,
184 void loopUpdate(Addr pc, bool Taken, BranchInfo* bi, bool tage_pred);
204 void condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken,
221 ThreadID tid, Addr branch_pc, bool cond_branch,
/gem5/src/mem/ruby/profiler/
H A DAccessTraceForAddress.hh50 void setAddress(Addr addr) { m_addr = addr; }
56 Addr getAddress() const { return m_addr; }
69 Addr m_addr;
/gem5/src/dev/
H A Dio_device.hh157 Addr pioAddr;
160 Addr pioSize;
167 BasicPioDevice(const Params *p, Addr size);
/gem5/src/arch/arm/
H A Dlocked_mem.hh65 handleLockedSnoop(XC *xc, PacketPtr pkt, Addr cacheBlockMask)
76 Addr locked_addr = xc->readMiscReg(MISCREG_LOCKADDR) & cacheBlockMask;
78 Addr snoop_addr = pkt->getAddr() & cacheBlockMask;
114 handleLockedWrite(XC *xc, const RequestPtr &req, Addr cacheBlockMask)
124 Addr lock_addr = xc->readMiscReg(MISCREG_LOCKADDR) & cacheBlockMask;
H A DArmSystem.py65 gic_cpu_addr = Param.Addr(0, "Addres of the GIC CPU interface")
66 flags_addr = Param.Addr(0, "Address of the flags register for MP booting")
74 reset_addr = Param.Addr(0x0,
97 m5ops_base = Param.Addr(0,
139 atags_addr = Param.Addr("Address where default atags structure should " \
/gem5/src/mem/cache/prefetch/
H A Dassociative_set_impl.hh56 AssociativeSet<Entry>::findEntry(Addr addr, bool is_secure) const
58 Addr tag = indexingPolicy->extractTag(addr);
81 AssociativeSet<Entry>::findVictim(Addr addr)
96 AssociativeSet<Entry>::getPossibleEntries(const Addr addr) const
111 AssociativeSet<Entry>::insertEntry(Addr addr, bool is_secure, Entry* entry)
H A Dsignature_path.hh171 void addPrefetch(Addr ppn, stride_t last_block, stride_t delta,
189 SignatureEntry &getSignatureEntry(Addr ppn, bool is_secure, stride_t block,
197 PatternEntry& getPatternEntry(Addr signature);
205 void updatePatternTable(Addr signature, stride_t stride);
258 virtual void auxiliaryPrefetcher(Addr ppn, stride_t current_block,
H A Daccess_map_pattern_matching.cc103 AccessMapPatternMatching::getAccessMapEntry(Addr am_addr,
120 Addr block, enum AccessMapState state)
161 Addr am_addr = pfi.getAddr() / hotZoneSize;
162 Addr current_block = (pfi.getAddr() % hotZoneSize) / blkSize;
201 Addr states_current_block = current_block + lines_per_zone;
208 Addr pf_addr;
213 Addr blk = states_current_block - stride;
219 Addr blk = current_block - stride;
232 Addr pf_addr;
237 Addr bl
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/gem5/src/arch/alpha/
H A Dprocess.cc57 Addr brk_point = objFile->dataBase() + objFile->dataSize() +
63 Addr stack_base = objFile->textBase() - (409600+4096);
66 Addr mmap_end = 0x10000;
68 Addr max_stack_size = 8 * 1024 * 1024;
71 Addr next_thread_stack_base = stack_base - max_stack_size;
150 Addr argv_array_base = memState->getStackMin() + intSize; // room for argc
151 Addr envp_array_base = argv_array_base + argv_array_size;
152 Addr auxv_array_base = envp_array_base + envp_array_size;
153 Addr arg_data_base = auxv_array_base + auxv_array_size;
154 Addr env_data_bas
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/gem5/src/mem/cache/
H A Dcache_blk.hh94 Addr tag;
136 Addr lowAddr; // low address of lock range
137 Addr highAddr; // high address of lock range
143 Addr req_low = req->getPaddr();
144 Addr req_high = req_low + req->getSize() -1;
152 Addr req_low = req->getPaddr();
153 Addr req_high = req_low + req->getSize() - 1;
304 virtual void insert(const Addr tag, const bool is_secure,
448 Addr _addr;
472 void insert(const Addr add
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Completed in 31 milliseconds

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