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35#
36# Authors: Ali Saidi
37#          Glenn Bergmans
38
39from m5.params import *
40from m5.options import *
41from m5.SimObject import *
42from m5.util.fdthelper import *
43
44from m5.objects.System import System
45from m5.objects.ArmSemihosting import ArmSemihosting
46
47class ArmMachineType(Enum):
48    map = {
49        'RealViewPBX' : 1901,
50        'VExpress_EMM' : 2272,
51        'VExpress_EMM64' : 2272,
52        'DTOnly' : -1,
53    }
54
55class SveVectorLength(UInt8): min = 1; max = 16
56
57class ArmSystem(System):
58    type = 'ArmSystem'
59    cxx_header = "arch/arm/system.hh"
60    multi_proc = Param.Bool(True, "Multiprocessor system?")
61    boot_loader = VectorParam.String([],
62        "File that contains the boot loader code. Zero or more files may be "
63        "specified. The first boot loader that matches the kernel's "
64        "architecture will be used.")
65    gic_cpu_addr = Param.Addr(0, "Addres of the GIC CPU interface")
66    flags_addr = Param.Addr(0, "Address of the flags register for MP booting")
67    have_security = Param.Bool(False,
68        "True if Security Extensions are implemented")
69    have_virtualization = Param.Bool(False,
70        "True if Virtualization Extensions are implemented")
71    have_crypto = Param.Bool(False,
72        "True if Crypto Extensions is implemented")
73    have_lpae = Param.Bool(True, "True if LPAE is implemented")
74    reset_addr = Param.Addr(0x0,
75        "Reset address (ARMv8)")
76    auto_reset_addr = Param.Bool(False,
77        "Determine reset address from kernel entry point if no boot loader")
78    highest_el_is_64 = Param.Bool(False,
79        "True if the register width of the highest implemented exception level "
80        "is 64 bits (ARMv8)")
81    phys_addr_range_64 = Param.UInt8(40,
82        "Supported physical address range in bits when using AArch64 (ARMv8)")
83    have_large_asid_64 = Param.Bool(False,
84        "True if ASID is 16 bits in AArch64 (ARMv8)")
85    have_sve = Param.Bool(True,
86        "True if SVE is implemented (ARMv8)")
87    sve_vl = Param.SveVectorLength(1,
88        "SVE vector length in quadwords (128-bit)")
89    have_lse = Param.Bool(True,
90        "True if LSE is implemented (ARMv8.1)")
91    have_pan = Param.Bool(True,
92        "True if Priviledge Access Never is implemented (ARMv8.1)")
93
94    semihosting = Param.ArmSemihosting(NULL,
95        "Enable support for the Arm semihosting by settings this parameter")
96
97    m5ops_base = Param.Addr(0,
98        "Base of the 64KiB PA range used for memory-mapped m5ops. Set to 0 "
99        "to disable.")
100
101    def generateDeviceTree(self, state):
102        # Generate a device tree root node for the system by creating the root
103        # node and adding the generated subnodes of all children.
104        # When a child needs to add multiple nodes, this is done by also
105        # creating a node called '/' which will then be merged with the
106        # root instead of appended.
107
108        def generateMemNode(mem_range):
109            node = FdtNode("memory@%x" % long(mem_range.start))
110            node.append(FdtPropertyStrings("device_type", ["memory"]))
111            node.append(FdtPropertyWords("reg",
112                state.addrCells(mem_range.start) +
113                state.sizeCells(mem_range.size()) ))
114            return node
115
116        root = FdtNode('/')
117        root.append(state.addrCellsProperty())
118        root.append(state.sizeCellsProperty())
119
120        # Add memory nodes
121        for mem_range in self.mem_ranges:
122            root.append(generateMemNode(mem_range))
123
124        for node in self.recurseDeviceTree(state):
125            # Merge root nodes instead of adding them (for children
126            # that need to add multiple root level nodes)
127            if node.get_name() == root.get_name():
128                root.merge(node)
129            else:
130                root.append(node)
131
132        return root
133
134class GenericArmSystem(ArmSystem):
135    type = 'GenericArmSystem'
136    cxx_header = "arch/arm/system.hh"
137    machine_type = Param.ArmMachineType('DTOnly',
138        "Machine id from http://www.arm.linux.org.uk/developer/machines/")
139    atags_addr = Param.Addr("Address where default atags structure should " \
140                                "be written")
141    dtb_filename = Param.String("",
142        "File that contains the Device Tree Blob. Don't use DTB if empty.")
143    early_kernel_symbols = Param.Bool(False,
144        "enable early kernel symbol tables before MMU")
145    enable_context_switch_stats_dump = Param.Bool(False, "enable stats/task info dumping at context switch boundaries")
146
147    panic_on_panic = Param.Bool(False, "Trigger a gem5 panic if the " \
148                                    "guest kernel panics")
149    panic_on_oops = Param.Bool(False, "Trigger a gem5 panic if the " \
150                                   "guest kernel oopses")
151
152    def generateDtb(self, outdir, filename):
153        """
154        Autogenerate DTB. Arguments are the folder where the DTB
155        will be stored, and the name of the DTB file.
156        """
157        state = FdtState(addr_cells=2, size_cells=2, cpu_cells=1)
158        rootNode = self.generateDeviceTree(state)
159
160        fdt = Fdt()
161        fdt.add_rootnode(rootNode)
162        dtb_filename = os.path.join(outdir, filename)
163        self.dtb_filename = fdt.writeDtbFile(dtb_filename)
164
165class LinuxArmSystem(GenericArmSystem):
166    type = 'LinuxArmSystem'
167    cxx_header = "arch/arm/linux/system.hh"
168
169    @cxxMethod
170    def dumpDmesg(self):
171        """Dump dmesg from the simulated kernel to standard out"""
172        pass
173
174    # Have Linux systems for ARM auto-calc their load_addr_mask for proper
175    # kernel relocation.
176    load_addr_mask = 0x0
177
178class FreebsdArmSystem(GenericArmSystem):
179    type = 'FreebsdArmSystem'
180    cxx_header = "arch/arm/freebsd/system.hh"
181