Searched refs:Addr (Results 301 - 325 of 767) sorted by relevance

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/gem5/src/arch/x86/insts/
H A Dmicroldstop.cc47 std::string LdStOp::generateDisassembly(Addr pc,
63 std::string LdStSplitOp::generateDisassembly(Addr pc,
H A Dmicromediaop.cc39 std::string MediaOpReg::generateDisassembly(Addr pc,
53 std::string MediaOpImm::generateDisassembly(Addr pc,
/gem5/src/mem/probes/
H A Dmem_footprint.hh59 typedef std::unordered_set<Addr> AddrSet;
74 void insertAddr(Addr addr, AddrSet *set, uint64_t limit);
86 // Addr set to track unique cache lines accessed
88 // Addr set to track unique cache lines accessed since simulation begin
90 // Addr set to track unique pages accessed
92 // Addr set to track unique pages accessed since simulation begin
/gem5/src/arch/power/insts/
H A Dbranch.cc39 PCDependentDisassembly::disassemble(Addr pc, const SymbolTable *symtab) const
63 BranchPCRel::generateDisassembly(Addr pc, const SymbolTable *symtab) const
69 Addr target = pc + disp;
87 BranchNonPCRel::generateDisassembly(Addr pc, const SymbolTable *symtab) const
109 BranchPCRelCond::generateDisassembly(Addr pc, const SymbolTable *symtab) const
117 Addr target = pc + disp;
135 BranchNonPCRelCond::generateDisassembly(Addr pc,
161 BranchRegCond::generateDisassembly(Addr pc,
H A Dcondition.hh61 Addr pc, const SymbolTable *symtab) const override;
83 Addr pc, const SymbolTable *symtab) const override;
H A Dinteger.cc37 IntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
84 IntImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
120 IntShiftOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
147 IntRotateOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
/gem5/src/arch/sparc/insts/
H A Dblockmem.hh70 Addr pc, const SymbolTable *symtab) const override;
85 Addr pc, const SymbolTable *symtab) const override;
H A Dunimp.hh72 generateDisassembly(Addr pc, const SymbolTable *symtab) const override
111 generateDisassembly(Addr pc, const SymbolTable *symtab) const override
/gem5/src/arch/mips/
H A Ddecoder.hh69 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
100 decode(ExtMachInst mach_inst, Addr addr)
/gem5/src/arch/riscv/
H A Ddecoder.hh71 void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst);
82 StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
/gem5/src/dev/arm/
H A Damba_fake.cc60 Addr daddr = pkt->getAddr() - pioAddr;
76 Addr daddr = pkt->getAddr() - pioAddr;
/gem5/src/dev/mips/
H A Dmalta.cc84 Addr
85 Malta::pciToDma(Addr pciAddr) const
/gem5/src/arch/arm/
H A Ddecoder.hh149 void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst);
173 StaticInstPtr decode(ExtMachInst mach_inst, Addr addr)
/gem5/src/arch/arm/insts/
H A Dsve.cc60 SvePredCountPredOp::generateDisassembly(Addr pc,
74 SvePredCountOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
94 SveIndexIIOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
104 SveIndexIROp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
115 SveIndexRIOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
127 SveIndexRROp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
140 SveWhileOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
158 SveCompTermOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
169 SveUnaryPredOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
182 SveUnaryUnpredOp::generateDisassembly(Addr p
[all...]
H A Dsve.hh70 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
85 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
100 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
115 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
133 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
149 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
164 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
177 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
191 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
205 std::string generateDisassembly(Addr p
[all...]
/gem5/src/arch/sparc/
H A Ddecoder.hh66 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
114 decode(ExtMachInst mach_inst, Addr addr)
/gem5/src/mem/cache/
H A Dqueue_entry.hh114 Addr blkAddr;
136 virtual bool matchBlockAddr(const Addr addr, const bool is_secure)
/gem5/src/mem/cache/tags/
H A Dfa_lru.hh133 typedef std::pair<Addr, bool> TagHashKey;
190 CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat,
196 CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat) override;
205 CacheBlk* findBlock(Addr addr, bool is_secure) const override;
226 CacheBlk* findVictim(Addr addr, const bool is_secure,
244 Addr extractTag(Addr addr) const override
255 Addr regenerateBlkAddr(const CacheBlk* blk) const override
/gem5/src/sim/
H A Dprocess.hh107 Addr getBias();
108 Addr getStartPC();
114 void allocateMem(Addr vaddr, int64_t size, bool clobber = false);
118 bool fixupStackFault(Addr vaddr);
157 bool map(Addr vaddr, Addr paddr, int size, bool cacheable = true);
159 void replicatePage(Addr vaddr, Addr new_paddr, ThreadContext *old_tc,
/gem5/src/arch/alpha/freebsd/
H A Dsystem.hh46 Addr addr)
/gem5/src/mem/
H A Dstack_dist_calc.hh81 * 1. pair<uint64_t, bool> calcStackDistAndUpdate(Addr r_address,
102 * 2. pair<uint64_t , bool> calcStackDist(Addr r_address, bool mark)
124 * (Addr r_address, bool addNewNode)
126 * (Addr r_address, bool mark)
182 typedef std::map<Addr, uint64_t> AddressIndexMap;
304 uint64_t verifyStackDist(const Addr r_address,
328 std::pair<uint64_t, bool> calcStackDist(const Addr r_address,
343 std::pair<uint64_t, bool> calcStackDistAndUpdate(const Addr r_address,
/gem5/src/mem/ruby/structures/
H A DDirectoryMemory.cc88 DirectoryMemory::isPresent(Addr address)
99 DirectoryMemory::mapAddressToLocalIdx(Addr address)
113 DirectoryMemory::lookup(Addr address)
124 DirectoryMemory::allocate(Addr address, AbstractEntry *entry)
/gem5/src/dev/serial/
H A Duart.hh57 Uart(const Params *p, Addr pio_size);
/gem5/src/arch/generic/
H A Ddecode_cache.cc43 TheISA::ExtMachInst mach_inst, Addr addr)
/gem5/src/arch/riscv/insts/
H A Dunknown.hh66 generateDisassembly(Addr pc, const SymbolTable *symtab) const override

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