/gem5/src/arch/x86/insts/ |
H A D | microldstop.cc | 47 std::string LdStOp::generateDisassembly(Addr pc, 63 std::string LdStSplitOp::generateDisassembly(Addr pc,
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H A D | micromediaop.cc | 39 std::string MediaOpReg::generateDisassembly(Addr pc, 53 std::string MediaOpImm::generateDisassembly(Addr pc,
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/gem5/src/mem/probes/ |
H A D | mem_footprint.hh | 59 typedef std::unordered_set<Addr> AddrSet; 74 void insertAddr(Addr addr, AddrSet *set, uint64_t limit); 86 // Addr set to track unique cache lines accessed 88 // Addr set to track unique cache lines accessed since simulation begin 90 // Addr set to track unique pages accessed 92 // Addr set to track unique pages accessed since simulation begin
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/gem5/src/arch/power/insts/ |
H A D | branch.cc | 39 PCDependentDisassembly::disassemble(Addr pc, const SymbolTable *symtab) const 63 BranchPCRel::generateDisassembly(Addr pc, const SymbolTable *symtab) const 69 Addr target = pc + disp; 87 BranchNonPCRel::generateDisassembly(Addr pc, const SymbolTable *symtab) const 109 BranchPCRelCond::generateDisassembly(Addr pc, const SymbolTable *symtab) const 117 Addr target = pc + disp; 135 BranchNonPCRelCond::generateDisassembly(Addr pc, 161 BranchRegCond::generateDisassembly(Addr pc,
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H A D | condition.hh | 61 Addr pc, const SymbolTable *symtab) const override; 83 Addr pc, const SymbolTable *symtab) const override;
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H A D | integer.cc | 37 IntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 84 IntImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 120 IntShiftOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 147 IntRotateOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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/gem5/src/arch/sparc/insts/ |
H A D | blockmem.hh | 70 Addr pc, const SymbolTable *symtab) const override; 85 Addr pc, const SymbolTable *symtab) const override;
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H A D | unimp.hh | 72 generateDisassembly(Addr pc, const SymbolTable *symtab) const override 111 generateDisassembly(Addr pc, const SymbolTable *symtab) const override
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/gem5/src/arch/mips/ |
H A D | decoder.hh | 69 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst) 100 decode(ExtMachInst mach_inst, Addr addr)
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/gem5/src/arch/riscv/ |
H A D | decoder.hh | 71 void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst); 82 StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
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/gem5/src/dev/arm/ |
H A D | amba_fake.cc | 60 Addr daddr = pkt->getAddr() - pioAddr; 76 Addr daddr = pkt->getAddr() - pioAddr;
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/gem5/src/dev/mips/ |
H A D | malta.cc | 84 Addr 85 Malta::pciToDma(Addr pciAddr) const
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/gem5/src/arch/arm/ |
H A D | decoder.hh | 149 void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst); 173 StaticInstPtr decode(ExtMachInst mach_inst, Addr addr)
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/gem5/src/arch/arm/insts/ |
H A D | sve.cc | 60 SvePredCountPredOp::generateDisassembly(Addr pc, 74 SvePredCountOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 94 SveIndexIIOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 104 SveIndexIROp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 115 SveIndexRIOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 127 SveIndexRROp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 140 SveWhileOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 158 SveCompTermOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 169 SveUnaryPredOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 182 SveUnaryUnpredOp::generateDisassembly(Addr p [all...] |
H A D | sve.hh | 70 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 85 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 100 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 115 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 133 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 149 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 164 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 177 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 191 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 205 std::string generateDisassembly(Addr p [all...] |
/gem5/src/arch/sparc/ |
H A D | decoder.hh | 66 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst) 114 decode(ExtMachInst mach_inst, Addr addr)
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/gem5/src/mem/cache/ |
H A D | queue_entry.hh | 114 Addr blkAddr; 136 virtual bool matchBlockAddr(const Addr addr, const bool is_secure)
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/gem5/src/mem/cache/tags/ |
H A D | fa_lru.hh | 133 typedef std::pair<Addr, bool> TagHashKey; 190 CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat, 196 CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat) override; 205 CacheBlk* findBlock(Addr addr, bool is_secure) const override; 226 CacheBlk* findVictim(Addr addr, const bool is_secure, 244 Addr extractTag(Addr addr) const override 255 Addr regenerateBlkAddr(const CacheBlk* blk) const override
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/gem5/src/sim/ |
H A D | process.hh | 107 Addr getBias(); 108 Addr getStartPC(); 114 void allocateMem(Addr vaddr, int64_t size, bool clobber = false); 118 bool fixupStackFault(Addr vaddr); 157 bool map(Addr vaddr, Addr paddr, int size, bool cacheable = true); 159 void replicatePage(Addr vaddr, Addr new_paddr, ThreadContext *old_tc,
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/gem5/src/arch/alpha/freebsd/ |
H A D | system.hh | 46 Addr addr)
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/gem5/src/mem/ |
H A D | stack_dist_calc.hh | 81 * 1. pair<uint64_t, bool> calcStackDistAndUpdate(Addr r_address, 102 * 2. pair<uint64_t , bool> calcStackDist(Addr r_address, bool mark) 124 * (Addr r_address, bool addNewNode) 126 * (Addr r_address, bool mark) 182 typedef std::map<Addr, uint64_t> AddressIndexMap; 304 uint64_t verifyStackDist(const Addr r_address, 328 std::pair<uint64_t, bool> calcStackDist(const Addr r_address, 343 std::pair<uint64_t, bool> calcStackDistAndUpdate(const Addr r_address,
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/gem5/src/mem/ruby/structures/ |
H A D | DirectoryMemory.cc | 88 DirectoryMemory::isPresent(Addr address) 99 DirectoryMemory::mapAddressToLocalIdx(Addr address) 113 DirectoryMemory::lookup(Addr address) 124 DirectoryMemory::allocate(Addr address, AbstractEntry *entry)
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/gem5/src/dev/serial/ |
H A D | uart.hh | 57 Uart(const Params *p, Addr pio_size);
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/gem5/src/arch/generic/ |
H A D | decode_cache.cc | 43 TheISA::ExtMachInst mach_inst, Addr addr)
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/gem5/src/arch/riscv/insts/ |
H A D | unknown.hh | 66 generateDisassembly(Addr pc, const SymbolTable *symtab) const override
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