1/*
2 * Copyright (c) 2012 Google
3 * Copyright (c) 2017 The University of Virginia
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Gabe Black
30 *          Alec Roelke
31 */
32
33#ifndef __ARCH_RISCV_DECODER_HH__
34#define __ARCH_RISCV_DECODER_HH__
35
36#include "arch/generic/decode_cache.hh"
37#include "arch/riscv/isa_traits.hh"
38#include "arch/riscv/types.hh"
39#include "base/logging.hh"
40#include "base/types.hh"
41#include "cpu/static_inst.hh"
42#include "debug/Decode.hh"
43
44namespace RiscvISA
45{
46
47class ISA;
48class Decoder
49{
50  private:
51    DecodeCache::InstMap<ExtMachInst> instMap;
52    bool aligned;
53    bool mid;
54    bool more;
55
56  protected:
57    //The extended machine instruction being generated
58    ExtMachInst emi;
59    bool instDone;
60
61  public:
62    Decoder(ISA* isa=nullptr) { reset(); }
63
64    void process() {}
65    void reset();
66
67    inline bool compressed(ExtMachInst inst) { return (inst & 0x3) < 0x3; }
68
69    //Use this to give data to the decoder. This should be used
70    //when there is control flow.
71    void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst);
72
73    bool needMoreBytes() { return more; }
74    bool instReady() { return instDone; }
75    void takeOverFrom(Decoder *old) {}
76
77    StaticInstPtr decodeInst(ExtMachInst mach_inst);
78
79    /// Decode a machine instruction.
80    /// @param mach_inst The binary instruction to decode.
81    /// @retval A pointer to the corresponding StaticInst object.
82    StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
83
84    StaticInstPtr decode(RiscvISA::PCState &nextPC);
85};
86
87} // namespace RiscvISA
88
89#endif // __ARCH_RISCV_DECODER_HH__
90