| /gem5/ext/ply/example/BASIC/ |
| H A D | basiclog.py | 12 level = logging.INFO, variable
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| /gem5/src/dev/arm/ |
| H A D | smmu_v3_ptops.cc | 68 V7LPageTableOps::isWritable(pte_t pte, unsigned level, bool stage2) const argument
161 isWritable(pte_t pte, unsigned level, bool stage2) const argument
259 isWritable(pte_t pte, unsigned level, bool stage2) const argument
358 isWritable(pte_t pte, unsigned level, bool stage2) const argument
[all...] |
| H A D | smmu_v3_caches.cc | 1014 lookup(Addr va, Addr vaMask, uint16_t asid, uint16_t vmid, unsigned stage, unsigned level, bool updStats) argument
1192 pickEntryIdxToReplace(const Set &set, unsigned stage, unsigned level) argument
[all...] |
| H A D | smmu_v3_caches.hh | 297 unsigned level; member in struct:WalkCache::Entry
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| H A D | smmu_v3_transl.cc | 647 walkCacheLookup( Yield &yield, const WalkCache::Entry *&walkEntry, Addr addr, uint16_t asid, uint16_t vmid, unsigned stage, unsigned level) argument
688 walkCacheUpdate(Yield &yield, Addr va, Addr vaMask, Addr pa, unsigned stage, unsigned level, bool leaf, uint8_t permissions) argument
729 walkStage1And2(Yield &yield, Addr addr, const PageTableOps *pt_ops, unsigned level, Addr walkPtr) argument
813 walkStage2(Yield &yield, Addr addr, bool final_tr, const PageTableOps *pt_ops, unsigned level, Addr walkPtr) argument
885 unsigned level; local
965 unsigned level = pt_ops->firstLevel(context.s2t0sz); local
[all...] |
| /gem5/ext/mcpat/ |
| H A D | cacheunit.cc | 456 int level, type; local
|
| H A D | core.cc | 1282 int level = core_params.execu_bypass_start_wiring_level; local
[all...] |
| /gem5/src/systemc/tests/systemc/1666-2011-compliance/child_proc_control/ |
| H A D | child_proc_control.cpp | 128 int level = 2; local
140 void child_proc(int i, int level) argument
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| /gem5/src/systemc/tests/systemc/1666-2011-compliance/mixed_child_procs/ |
| H A D | mixed_child_procs.cpp | 125 void child_thread(int i, int level) argument
164 child_method(int i, int level) argument
[all...] |
| /gem5/ext/systemc/src/sysc/kernel/ |
| H A D | sc_reset.cpp | 99 sc_reset_finder( bool async, const sc_in<bool>* port_p, bool level, sc_process_b* target_p) argument
108 sc_reset_finder( bool async, const sc_inout<bool>* port_p, bool level, sc_process_b* target_p ) argument
118 sc_reset_finder( bool async, const sc_out<bool>* port_p, bool level, sc_process_b* target_p ) argument
246 reset_signal_is( bool async, const sc_in<bool>& port, bool level) argument
[all...] |
| H A D | sc_module.cpp | 307 sc_module::async_reset_signal_is(const sc_signal_in_if<bool>& iface, bool level) argument
[all...] |
| /gem5/src/base/ |
| H A D | trie.hh | 86 dump(std::ostream &os, int level) argument
|
| /gem5/src/arch/x86/ |
| H A D | intmessage.hh | 48 Bitfield<20> level; member in namespace:X86ISA
|
| H A D | interrupts.cc | 225 requestInterrupt(uint8_t vector, uint8_t deliveryMode, bool level) argument
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| /gem5/src/arch/sparc/ |
| H A D | interrupts.hh | 93 int level = 15; local
236 int level = InterruptLevel(interrupts[IT_SOFT_INT]); local
|
| H A D | faults.cc | 525 PrivilegeLevel level = getNextLevel(current); local
|
| /gem5/src/arch/x86/regs/ |
| H A D | apic.hh | 97 Bitfield<14> level; member in namespace:X86ISA
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| /gem5/src/mem/ |
| H A D | stack_dist_calc.cc | 99 updateSum(Node* node, bool from_left, uint64_t sum_from_below, uint64_t level, uint64_t stack_dist, bool discard_node) argument
190 uint64_t level = 0; local
[all...] |
| /gem5/src/sim/ |
| H A D | syscall_emul.cc | 1718 int level = p->getSyscallArg(tc, index); local
1823 int level = p->getSyscallArg(tc, index); local
|