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Searched hist:8851 (Results 1 - 19 of 19) sorted by relevance

/gem5/src/dev/x86/
H A D	intdev.cc	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
H A D	intdev.hh	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
H A D	i82094aa.cc	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
H A D	i82094aa.hh	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
/gem5/src/cpu/testers/directedtest/
H A D	RubyDirectedTester.cc	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
/gem5/src/dev/alpha/
H A D	tsunami_pchip.cc	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
/gem5/src/dev/arm/
H A D	pl111.cc	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
/gem5/src/cpu/testers/rubytest/
H A D	RubyTester.cc	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
/gem5/src/arch/arm/
H A D	table_walker.hh	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
H A D	table_walker.cc	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
/gem5/src/arch/x86/
H A D	interrupts.cc	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
H A D	interrupts.hh	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
/gem5/src/mem/
H A D	bridge.hh	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
H A D	bridge.cc	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
H A D	physical.cc	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
/gem5/src/mem/ruby/system/
H A D	RubyPort.hh	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
H A D	RubyPort.cc	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
/gem5/src/dev/
H A D	io_device.hh	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
H A D	io_device.cc	diff 8851:7e966326ef5b Fri Feb 24 11:43:00 EST 2012 Andreas Hansson <andreas.hansson@arm.com> MEM: Move port creation to the memory object(s) construction This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.

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