/gem5/src/arch/alpha/ |
H A D | kernel_stats.cc | 156 Statistics::setIdleProcess(Addr idlepcbb, ThreadContext *tc) argument 161 changeMode(themode, tc); 165 Statistics::changeMode(cpu_mode newmode, ThreadContext *tc) argument 174 Linux::ThreadInfo(tc).curTaskPID()); 184 Statistics::mode(cpu_mode newmode, ThreadContext *tc) argument 186 Addr pcbb = tc->readMiscRegNoEffect(IPR_PALtemp23); 191 changeMode(newmode, tc); 195 Statistics::context(Addr oldpcbb, Addr newpcbb, ThreadContext *tc) argument 200 changeMode(newpcbb == idleProcess ? idle : kernel, tc); 203 Linux::ThreadInfo(tc, oldpcb 208 callpal(int code, ThreadContext *tc) argument [all...] |
H A D | tlb.hh | 140 Fault translateData(const RequestPtr &req, ThreadContext *tc, bool write); 141 Fault translateInst(const RequestPtr &req, ThreadContext *tc); 145 const RequestPtr &req, ThreadContext *tc, Mode mode) override; 147 const RequestPtr &req, ThreadContext *tc, 150 const RequestPtr &req, ThreadContext *tc,
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H A D | vtophys.cc | 91 vtophys(ThreadContext *tc, Addr addr) argument 94 Addr ptbr = tc->readMiscRegNoEffect(IPR_PALtemp20); 107 kernel_pte_lookup(tc->getPhysProxy(), ptbr, vaddr);
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/gem5/src/cpu/ |
H A D | static_inst.cc | 83 StaticInst::hasBranchTarget(const TheISA::PCState &pc, ThreadContext *tc, argument 92 tgt = branchTarget(tc); 115 StaticInst::branchTarget(ThreadContext *tc) const
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H A D | inst_pb_trace.cc | 123 InstPBTrace::getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr si, argument 130 return new InstPBTraceRecord(*this, when, tc, si, pc, mi); 135 InstPBTrace::traceInst(ThreadContext *tc, StaticInstPtr si, TheISA::PCState pc) argument 160 curMsg->set_cpuid(tc->cpuId());
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H A D | nativetrace.hh | 81 getInstRecord(Tick when, ThreadContext *tc, argument 85 return new NativeTraceRecord(this, when, tc,
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/gem5/src/arch/alpha/linux/ |
H A D | system.hh | 58 virtual void process(ThreadContext *tc); 65 virtual void process(ThreadContext *tc); 140 void setDelayLoop(ThreadContext *tc);
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/gem5/src/arch/power/ |
H A D | tlb.hh | 163 Fault translateInst(const RequestPtr &req, ThreadContext *tc); 164 Fault translateData(const RequestPtr &req, ThreadContext *tc, bool write); 166 const RequestPtr &req, ThreadContext *tc, Mode mode) override; 168 const RequestPtr &req, ThreadContext *tc, 172 ThreadContext *tc, Mode mode) const override;
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H A D | tlb.cc | 282 TLB::translateInst(const RequestPtr &req, ThreadContext *tc) 291 Process * p = tc->getProcessPtr(); 301 TLB::translateData(const RequestPtr &req, ThreadContext *tc, bool write) 303 Process * p = tc->getProcessPtr(); 313 TLB::translateAtomic(const RequestPtr &req, ThreadContext *tc, Mode mode) 319 return translateInst(req, tc); 321 return translateData(req, tc, mode == Write); 325 TLB::translateTiming(const RequestPtr &req, ThreadContext *tc, 329 translation->finish(translateAtomic(req, tc, mode), req, tc, mod [all...] |
H A D | process.cc | 265 ThreadContext *tc = system->getThreadContext(contextIds[0]); local 268 tc->setIntReg(StackPointerReg, stack_min); 270 tc->pcState(getStartPC()); 277 PowerProcess::getSyscallArg(ThreadContext *tc, int &i) argument 280 return tc->readIntReg(ArgumentReg0 + i++); 284 PowerProcess::setSyscallArg(ThreadContext *tc, int i, RegVal val) argument 287 tc->setIntReg(ArgumentReg0 + i, val); 291 PowerProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) argument 293 Cr cr = tc->readIntReg(INTREG_CR); 299 tc [all...] |
/gem5/src/arch/mips/ |
H A D | tlb.cc | 285 TLB::translateInst(const RequestPtr &req, ThreadContext *tc) 290 Process * p = tc->getProcessPtr(); 300 TLB::translateData(const RequestPtr &req, ThreadContext *tc, bool write) 305 Process * p = tc->getProcessPtr(); 315 TLB::translateAtomic(const RequestPtr &req, ThreadContext *tc, Mode mode) 318 return translateInst(req, tc); 320 return translateData(req, tc, mode == Write); 324 TLB::translateTiming(const RequestPtr &req, ThreadContext *tc, 328 translation->finish(translateAtomic(req, tc, mode), req, tc, mod [all...] |
H A D | isa.hh | 94 RegVal readMiscReg(int misc_reg, ThreadContext *tc, ThreadID tid = 0); 102 ThreadContext *tc, ThreadID tid=0); 132 void startup(ThreadContext *tc) {} argument
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/gem5/src/gpu-compute/ |
H A D | gpu_tlb.hh | 117 ThreadContext *tc, Mode mode) = 0; 180 Fault translateInt(const RequestPtr &req, ThreadContext *tc); 182 Fault translate(const RequestPtr &req, ThreadContext *tc, 225 Fault translateAtomic(const RequestPtr &req, ThreadContext *tc, 228 void translateTiming(const RequestPtr &req, ThreadContext *tc, 232 Tick doMmuRegRead(ThreadContext *tc, Packet *pkt); 233 Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt); 243 ThreadContext *tc, bool update_stats); 250 void pagingProtectionChecks(ThreadContext *tc, PacketPtr pkt, 335 ThreadContext *tc; member in struct:X86ISA::GpuTLB::TranslationState [all...] |
/gem5/src/arch/mips/linux/ |
H A D | process.cc | 83 unameFunc(SyscallDesc *desc, int callnum, ThreadContext *tc) argument 86 auto process = tc->getProcessPtr(); 87 TypedBufferArg<Linux::utsname> name(process->getSyscallArg(tc, index)); 95 name.copyOut(tc->getVirtProxy()); 103 sys_getsysinfoFunc(SyscallDesc *desc, int callnum, ThreadContext *tc) argument 106 auto process = tc->getProcessPtr(); 107 unsigned op = process->getSyscallArg(tc, index); 108 unsigned bufPtr = process->getSyscallArg(tc, index); 109 // unsigned nbytes = process->getSyscallArg(tc, index); 118 fpcr.copyOut(tc 132 sys_setsysinfoFunc(SyscallDesc *desc, int callnum, ThreadContext *tc) argument 162 setThreadAreaFunc(SyscallDesc *desc, int callnum, ThreadContext *tc) argument [all...] |
/gem5/src/arch/riscv/ |
H A D | process.cc | 247 ThreadContext *tc = system->getThreadContext(contextIds[0]); local 248 tc->setIntReg(StackPointerReg, memState->getStackMin()); 249 tc->pcState(getStartPC()); 255 RiscvProcess::getSyscallArg(ThreadContext *tc, int &i) argument 261 retval = tc->readIntReg(SyscallArgumentRegs[i]); 267 RiscvProcess::setSyscallArg(ThreadContext *tc, int i, RegVal val) argument 269 tc->setIntReg(SyscallArgumentRegs[i], val); 273 RiscvProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) argument 277 tc->setIntReg(SyscallPseudoReturnReg, sysret.returnValue()); 280 tc [all...] |
H A D | tlb.cc | 287 TLB::translateInst(const RequestPtr &req, ThreadContext *tc) 294 if (static_cast<RiscvSystem *>(tc->getSystemPtr())->isBareMetal()) 311 Process * p = tc->getProcessPtr(); 322 TLB::translateData(const RequestPtr &req, ThreadContext *tc, bool write) 329 if (static_cast<RiscvSystem *>(tc->getSystemPtr())->isBareMetal()) 357 Process * p = tc->getProcessPtr(); 368 TLB::translateAtomic(const RequestPtr &req, ThreadContext *tc, Mode mode) 371 return translateInst(req, tc); 373 return translateData(req, tc, mode == Write); 377 TLB::translateTiming(const RequestPtr &req, ThreadContext *tc, [all...] |
H A D | remote_gdb.hh | 84 RemoteGDB(System *_system, ThreadContext *tc, int _port);
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H A D | stacktrace.cc | 67 : tc(0), stack(64) 73 : tc(0), stack(64)
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/gem5/src/arch/sparc/ |
H A D | utility.cc | 48 getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp) argument 57 return tc->readIntReg(8 + number); 59 Addr sp = tc->readIntReg(StackPointerReg); 60 PortProxy &vp = tc->getVirtProxy(); 249 skipFunction(ThreadContext *tc) argument 251 PCState newPC = tc->pcState(); 252 newPC.set(tc->readIntReg(ReturnAddressReg)); 253 tc->pcState(newPC); 258 initCPU(ThreadContext *tc, int cpuId) argument 262 por->invoke(tc); [all...] |
H A D | faults.hh | 74 void invoke(ThreadContext * tc, const StaticInstPtr &inst = 102 void invoke(ThreadContext * tc, const StaticInstPtr &inst = 216 void invoke(ThreadContext * tc, const StaticInstPtr &inst = 229 void invoke(ThreadContext * tc, const StaticInstPtr &inst = 248 void invoke(ThreadContext * tc, const StaticInstPtr &inst = 265 void invoke(ThreadContext * tc, const StaticInstPtr &inst = 282 void invoke(ThreadContext * tc, const StaticInstPtr &inst = 351 void enterREDState(ThreadContext *tc); 353 void doREDFault(ThreadContext *tc, TrapType tt); 355 void doNormalFault(ThreadContext *tc, TrapTyp [all...] |
H A D | isa.cc | 338 ISA::readMiscReg(int miscReg, ThreadContext * tc) argument 350 tc->getCpuPtr()->instCount(), stick); 351 return mbits(tc->getCpuPtr()->instCount() + (int64_t)stick,62,2) | 380 return readFSReg(miscReg, tc); 567 ISA::setMiscReg(int miscReg, RegVal val, ThreadContext * tc) argument 573 tc->getDecoderPtr()->setContext(val); 579 stick = mbits(val,62,0) - tc->getCpuPtr()->instCount(); 596 tc->getCpuPtr()->postInterrupt(0, IT_TRAP_LEVEL_ZERO, 0); 598 tc->getCpuPtr()->clearInterrupt(0, IT_TRAP_LEVEL_ZERO, 0); 636 setFSReg(miscReg, val, tc); 684 ThreadContext *tc = NULL; local 770 ThreadContext *tc = NULL; local [all...] |
H A D | tlb.cc | 419 TLB::translateInst(const RequestPtr &req, ThreadContext *tc) 421 uint64_t tlbdata = tc->readMiscRegNoEffect(MISCREG_TLB_DATA); 533 TLB::translateData(const RequestPtr &req, ThreadContext *tc, bool write) argument 539 uint64_t tlbdata = tc->readMiscRegNoEffect(MISCREG_TLB_DATA); 837 TLB::translateAtomic(const RequestPtr &req, ThreadContext *tc, Mode mode) argument 840 return translateInst(req, tc); 842 return translateData(req, tc, mode == Write); 846 TLB::translateTiming(const RequestPtr &req, ThreadContext *tc, argument 850 translation->finish(translateAtomic(req, tc, mode), req, tc, mod local 854 finalizePhysical(const RequestPtr &req, ThreadContext *tc, Mode mode) const argument 861 doMmuRegRead(ThreadContext *tc, Packet *pkt) argument 1046 doMmuRegWrite(ThreadContext *tc, Packet *pkt) argument 1300 GetTsbPtr(ThreadContext *tc, Addr addr, int ctx, Addr *ptrs) argument [all...] |
/gem5/src/arch/arm/ |
H A D | table_walker.cc | 131 tc(nullptr), aarch64(false), el(EL0), physAddrRange(0), req(nullptr), 232 currState->tc = _tc; 263 currState->tc, currState->el); 269 currState->sctlr = currState->tc->readMiscReg(MISCREG_SCTLR_EL1); 270 currState->vtcr = currState->tc->readMiscReg(MISCREG_VTCR_EL2); 274 currState->sctlr = currState->tc->readMiscReg(MISCREG_SCTLR_EL1); 275 currState->tcr = currState->tc->readMiscReg(MISCREG_TCR_EL1); 279 currState->sctlr = currState->tc->readMiscReg(MISCREG_SCTLR_EL2); 280 currState->tcr = currState->tc->readMiscReg(MISCREG_TCR_EL2); 284 currState->sctlr = currState->tc 409 ThreadContext *tc = currState->tc; local 1024 memAttrs(ThreadContext *tc, TlbEntry &te, SCTLR sctlr, uint8_t texcb, bool s) argument 1231 memAttrsLPAE(ThreadContext *tc, TlbEntry &te, LongDescriptor &lDescriptor) argument 1357 memAttrsAArch64(ThreadContext *tc, TlbEntry &te, LongDescriptor &lDescriptor) argument 1967 nextWalk(ThreadContext *tc) argument [all...] |
/gem5/src/arch/x86/ |
H A D | cpuid.hh | 60 bool doCpuid(ThreadContext * tc, uint32_t function,
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/gem5/src/arch/arm/freebsd/ |
H A D | system.hh | 80 * @param tc thread context that is currentyl executing */ 81 void mapPid(ThreadContext* tc, uint32_t pid);
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