1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Nathan Binkert 29 * Steve Reinhardt 30 * Ali Saidi 31 */ 32 33#include "arch/alpha/vtophys.hh" 34 35#include <string> 36 37#include "arch/alpha/ev5.hh" 38#include "base/chunk_generator.hh" 39#include "base/trace.hh" 40#include "cpu/thread_context.hh" 41#include "debug/VtoPhys.hh" 42#include "mem/port_proxy.hh" 43 44using namespace std; 45 46namespace AlphaISA { 47 48PageTableEntry 49kernel_pte_lookup(PortProxy &mem, Addr ptbr, VAddr vaddr) 50{ 51 Addr level1_pte = ptbr + vaddr.level1(); 52 PageTableEntry level1 = mem.read<uint64_t>(level1_pte); 53 if (!level1.valid()) { 54 DPRINTF(VtoPhys, "level 1 PTE not valid, va = %#\n", vaddr); 55 return 0; 56 } 57 58 Addr level2_pte = level1.paddr() + vaddr.level2(); 59 PageTableEntry level2 = mem.read<uint64_t>(level2_pte); 60 if (!level2.valid()) { 61 DPRINTF(VtoPhys, "level 2 PTE not valid, va = %#x\n", vaddr); 62 return 0; 63 } 64 65 Addr level3_pte = level2.paddr() + vaddr.level3(); 66 PageTableEntry level3 = mem.read<uint64_t>(level3_pte); 67 if (!level3.valid()) { 68 DPRINTF(VtoPhys, "level 3 PTE not valid, va = %#x\n", vaddr); 69 return 0; 70 } 71 return level3; 72} 73 74Addr 75vtophys(Addr vaddr) 76{ 77 Addr paddr = 0; 78 if (IsUSeg(vaddr)) 79 DPRINTF(VtoPhys, "vtophys: invalid vaddr %#x", vaddr); 80 else if (IsK0Seg(vaddr)) 81 paddr = K0Seg2Phys(vaddr); 82 else 83 panic("vtophys: ptbr is not set on virtual lookup"); 84 85 DPRINTF(VtoPhys, "vtophys(%#x) -> %#x\n", vaddr, paddr); 86 87 return paddr; 88} 89 90Addr 91vtophys(ThreadContext *tc, Addr addr) 92{ 93 VAddr vaddr = addr; 94 Addr ptbr = tc->readMiscRegNoEffect(IPR_PALtemp20); 95 Addr paddr = 0; 96 //@todo Andrew couldn't remember why he commented some of this code 97 //so I put it back in. Perhaps something to do with gdb debugging? 98 if (PcPAL(vaddr) && (vaddr < PalMax)) { 99 paddr = vaddr & ~ULL(1); 100 } else { 101 if (IsK0Seg(vaddr)) { 102 paddr = K0Seg2Phys(vaddr); 103 } else if (!ptbr) { 104 paddr = vaddr; 105 } else { 106 PageTableEntry pte = 107 kernel_pte_lookup(tc->getPhysProxy(), ptbr, vaddr); 108 if (pte.valid()) 109 paddr = pte.paddr() | vaddr.offset(); 110 } 111 } 112 113 114 DPRINTF(VtoPhys, "vtophys(%#x) -> %#x\n", vaddr, paddr); 115 116 return paddr; 117} 118 119} // namespace AlphaISA 120