1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 *          Kevin Lim
30 */
31
32#ifndef __SPARC_FAULTS_HH__
33#define __SPARC_FAULTS_HH__
34
35#include "cpu/static_inst.hh"
36#include "sim/faults.hh"
37
38// The design of the "name" and "vect" functions is in sim/faults.hh
39
40namespace SparcISA
41{
42
43typedef uint32_t TrapType;
44typedef uint32_t FaultPriority;
45
46class ITB;
47
48class SparcFaultBase : public FaultBase
49{
50  public:
51    enum PrivilegeLevel
52    {
53        U, User = U,
54        P, Privileged = P,
55        H, Hyperprivileged = H,
56        NumLevels,
57        SH = -1,
58        ShouldntHappen = SH
59    };
60    using PrivilegeLevelSpec = std::array<PrivilegeLevel, NumLevels>;
61    struct FaultVals
62    {
63        const FaultName name;
64        const TrapType trapType;
65        const FaultPriority priority;
66        const PrivilegeLevelSpec nextPrivilegeLevel;
67        FaultStat count;
68        FaultVals(const FaultName& name_, const TrapType& trapType_,
69                const FaultPriority& priority_, const PrivilegeLevelSpec& il)
70            : name(name_), trapType(trapType_), priority(priority_),
71            nextPrivilegeLevel(il)
72        {}
73    };
74    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
75                StaticInst::nullStaticInstPtr);
76    virtual TrapType trapType() = 0;
77    virtual FaultPriority priority() = 0;
78    virtual FaultStat & countStat() = 0;
79    virtual PrivilegeLevel getNextLevel(PrivilegeLevel current) = 0;
80};
81
82template<typename T>
83class SparcFault : public SparcFaultBase
84{
85  protected:
86    static FaultVals vals;
87  public:
88    FaultName name() const { return vals.name; }
89    TrapType trapType() { return vals.trapType; }
90    FaultPriority priority() { return vals.priority; }
91    FaultStat & countStat() { return vals.count; }
92
93    PrivilegeLevel
94    getNextLevel(PrivilegeLevel current)
95    {
96        return vals.nextPrivilegeLevel[current];
97    }
98};
99
100class PowerOnReset : public SparcFault<PowerOnReset>
101{
102    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
103                StaticInst::nullStaticInstPtr);
104};
105
106class WatchDogReset : public SparcFault<WatchDogReset> {};
107
108class ExternallyInitiatedReset : public SparcFault<ExternallyInitiatedReset> {};
109
110class SoftwareInitiatedReset : public SparcFault<SoftwareInitiatedReset> {};
111
112class REDStateException : public SparcFault<REDStateException> {};
113
114class StoreError : public SparcFault<StoreError> {};
115
116class InstructionAccessException : public SparcFault<InstructionAccessException> {};
117
118// class InstructionAccessMMUMiss : public SparcFault<InstructionAccessMMUMiss> {};
119
120class InstructionAccessError : public SparcFault<InstructionAccessError> {};
121
122class IllegalInstruction : public SparcFault<IllegalInstruction> {};
123
124class PrivilegedOpcode : public SparcFault<PrivilegedOpcode> {};
125
126// class UnimplementedLDD : public SparcFault<UnimplementedLDD> {};
127
128// class UnimplementedSTD : public SparcFault<UnimplementedSTD> {};
129
130class FpDisabled : public SparcFault<FpDisabled> {};
131class VecDisabled : public SparcFault<VecDisabled> {};
132
133class FpExceptionIEEE754 : public SparcFault<FpExceptionIEEE754> {};
134
135class FpExceptionOther : public SparcFault<FpExceptionOther> {};
136
137class TagOverflow : public SparcFault<TagOverflow> {};
138
139class CleanWindow : public SparcFault<CleanWindow> {};
140
141class DivisionByZero : public SparcFault<DivisionByZero> {};
142
143class InternalProcessorError :
144    public SparcFault<InternalProcessorError> {};
145
146class InstructionInvalidTSBEntry :
147    public SparcFault<InstructionInvalidTSBEntry> {};
148
149class DataInvalidTSBEntry : public SparcFault<DataInvalidTSBEntry> {};
150
151class DataAccessException : public SparcFault<DataAccessException> {};
152
153// class DataAccessMMUMiss : public SparcFault<DataAccessMMUMiss> {};
154
155class DataAccessError : public SparcFault<DataAccessError> {};
156
157class DataAccessProtection : public SparcFault<DataAccessProtection> {};
158
159class MemAddressNotAligned :
160    public SparcFault<MemAddressNotAligned> {};
161
162class LDDFMemAddressNotAligned : public SparcFault<LDDFMemAddressNotAligned> {};
163
164class STDFMemAddressNotAligned : public SparcFault<STDFMemAddressNotAligned> {};
165
166class PrivilegedAction : public SparcFault<PrivilegedAction> {};
167
168class LDQFMemAddressNotAligned : public SparcFault<LDQFMemAddressNotAligned> {};
169
170class STQFMemAddressNotAligned : public SparcFault<STQFMemAddressNotAligned> {};
171
172class InstructionRealTranslationMiss :
173    public SparcFault<InstructionRealTranslationMiss> {};
174
175class DataRealTranslationMiss : public SparcFault<DataRealTranslationMiss> {};
176
177// class AsyncDataError : public SparcFault<AsyncDataError> {};
178
179template <class T>
180class EnumeratedFault : public SparcFault<T>
181{
182  protected:
183    uint32_t _n;
184  public:
185    EnumeratedFault(uint32_t n) : SparcFault<T>(), _n(n) {}
186    TrapType trapType() { return SparcFault<T>::trapType() + _n; }
187};
188
189class InterruptLevelN : public EnumeratedFault<InterruptLevelN>
190{
191  public:
192    InterruptLevelN(uint32_t n) : EnumeratedFault<InterruptLevelN>(n) {;}
193    FaultPriority priority() { return 3200 - _n*100; }
194};
195
196class HstickMatch : public SparcFault<HstickMatch> {};
197
198class TrapLevelZero : public SparcFault<TrapLevelZero> {};
199
200class InterruptVector : public SparcFault<InterruptVector> {};
201
202class PAWatchpoint : public SparcFault<PAWatchpoint> {};
203
204class VAWatchpoint : public SparcFault<VAWatchpoint> {};
205
206class FastInstructionAccessMMUMiss :
207    public SparcFault<FastInstructionAccessMMUMiss>
208{
209  protected:
210    Addr vaddr;
211  public:
212    FastInstructionAccessMMUMiss(Addr addr) : vaddr(addr)
213    {}
214    FastInstructionAccessMMUMiss() : vaddr(0)
215    {}
216    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
217                StaticInst::nullStaticInstPtr);
218};
219
220class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss>
221{
222  protected:
223    Addr vaddr;
224  public:
225    FastDataAccessMMUMiss(Addr addr) : vaddr(addr)
226    {}
227    FastDataAccessMMUMiss() : vaddr(0)
228    {}
229    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
230                StaticInst::nullStaticInstPtr);
231};
232
233class FastDataAccessProtection : public SparcFault<FastDataAccessProtection> {};
234
235class InstructionBreakpoint : public SparcFault<InstructionBreakpoint> {};
236
237class CpuMondo : public SparcFault<CpuMondo> {};
238
239class DevMondo : public SparcFault<DevMondo> {};
240
241class ResumableError : public SparcFault<ResumableError> {};
242
243class SpillNNormal : public EnumeratedFault<SpillNNormal>
244{
245  public:
246    SpillNNormal(uint32_t n) : EnumeratedFault<SpillNNormal>(n) {;}
247    // These need to be handled specially to enable spill traps in SE
248    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
249                StaticInst::nullStaticInstPtr);
250};
251
252class SpillNOther : public EnumeratedFault<SpillNOther>
253{
254  public:
255    SpillNOther(uint32_t n) : EnumeratedFault<SpillNOther>(n)
256    {}
257};
258
259class FillNNormal : public EnumeratedFault<FillNNormal>
260{
261  public:
262    FillNNormal(uint32_t n) : EnumeratedFault<FillNNormal>(n)
263    {}
264    // These need to be handled specially to enable fill traps in SE
265    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
266                StaticInst::nullStaticInstPtr);
267};
268
269class FillNOther : public EnumeratedFault<FillNOther>
270{
271  public:
272    FillNOther(uint32_t n) : EnumeratedFault<FillNOther>(n)
273    {}
274};
275
276class TrapInstruction : public EnumeratedFault<TrapInstruction>
277{
278  public:
279    TrapInstruction(uint32_t n) : EnumeratedFault<TrapInstruction>(n)
280    {}
281    // In SE, trap instructions are requesting services from the OS.
282    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
283                StaticInst::nullStaticInstPtr);
284};
285
286/*
287 * Explicitly declare template static member variables to avoid warnings
288 * in some clang versions
289 */
290template<> SparcFaultBase::FaultVals SparcFault<PowerOnReset>::vals;
291template<> SparcFaultBase::FaultVals SparcFault<WatchDogReset>::vals;
292template<> SparcFaultBase::FaultVals
293    SparcFault<ExternallyInitiatedReset>::vals;
294template<> SparcFaultBase::FaultVals SparcFault<SoftwareInitiatedReset>::vals;
295template<> SparcFaultBase::FaultVals SparcFault<REDStateException>::vals;
296template<> SparcFaultBase::FaultVals SparcFault<StoreError>::vals;
297template<> SparcFaultBase::FaultVals
298    SparcFault<InstructionAccessException>::vals;
299template<> SparcFaultBase::FaultVals SparcFault<InstructionAccessError>::vals;
300template<> SparcFaultBase::FaultVals SparcFault<IllegalInstruction>::vals;
301template<> SparcFaultBase::FaultVals SparcFault<PrivilegedOpcode>::vals;
302template<> SparcFaultBase::FaultVals SparcFault<FpDisabled>::vals;
303template<> SparcFaultBase::FaultVals SparcFault<VecDisabled>::vals;
304template<> SparcFaultBase::FaultVals SparcFault<FpExceptionIEEE754>::vals;
305template<> SparcFaultBase::FaultVals SparcFault<FpExceptionOther>::vals;
306template<> SparcFaultBase::FaultVals SparcFault<TagOverflow>::vals;
307template<> SparcFaultBase::FaultVals SparcFault<CleanWindow>::vals;
308template<> SparcFaultBase::FaultVals SparcFault<DivisionByZero>::vals;
309template<> SparcFaultBase::FaultVals SparcFault<InternalProcessorError>::vals;
310template<> SparcFaultBase::FaultVals
311    SparcFault<InstructionInvalidTSBEntry>::vals;
312template<> SparcFaultBase::FaultVals SparcFault<DataInvalidTSBEntry>::vals;
313template<> SparcFaultBase::FaultVals SparcFault<DataAccessException>::vals;
314template<> SparcFaultBase::FaultVals SparcFault<DataAccessError>::vals;
315template<> SparcFaultBase::FaultVals SparcFault<DataAccessProtection>::vals;
316template<> SparcFaultBase::FaultVals SparcFault<MemAddressNotAligned>::vals;
317template<> SparcFaultBase::FaultVals
318    SparcFault<LDDFMemAddressNotAligned>::vals;
319template<> SparcFaultBase::FaultVals
320    SparcFault<STDFMemAddressNotAligned>::vals;
321template<> SparcFaultBase::FaultVals SparcFault<PrivilegedAction>::vals;
322template<> SparcFaultBase::FaultVals
323    SparcFault<LDQFMemAddressNotAligned>::vals;
324template<> SparcFaultBase::FaultVals
325    SparcFault<STQFMemAddressNotAligned>::vals;
326template<> SparcFaultBase::FaultVals
327    SparcFault<InstructionRealTranslationMiss>::vals;
328template<> SparcFaultBase::FaultVals SparcFault<DataRealTranslationMiss>::vals;
329template<> SparcFaultBase::FaultVals SparcFault<InterruptLevelN>::vals;
330template<> SparcFaultBase::FaultVals SparcFault<HstickMatch>::vals;
331template<> SparcFaultBase::FaultVals SparcFault<TrapLevelZero>::vals;
332template<> SparcFaultBase::FaultVals SparcFault<InterruptVector>::vals;
333template<> SparcFaultBase::FaultVals SparcFault<PAWatchpoint>::vals;
334template<> SparcFaultBase::FaultVals SparcFault<VAWatchpoint>::vals;
335template<> SparcFaultBase::FaultVals
336    SparcFault<FastInstructionAccessMMUMiss>::vals;
337template<> SparcFaultBase::FaultVals SparcFault<FastDataAccessMMUMiss>::vals;
338template<>
339     SparcFaultBase::FaultVals SparcFault<FastDataAccessProtection>::vals;
340template<> SparcFaultBase::FaultVals SparcFault<InstructionBreakpoint>::vals;
341template<> SparcFaultBase::FaultVals SparcFault<CpuMondo>::vals;
342template<> SparcFaultBase::FaultVals SparcFault<DevMondo>::vals;
343template<> SparcFaultBase::FaultVals SparcFault<ResumableError>::vals;
344template<> SparcFaultBase::FaultVals SparcFault<SpillNNormal>::vals;
345template<> SparcFaultBase::FaultVals SparcFault<SpillNOther>::vals;
346template<> SparcFaultBase::FaultVals SparcFault<FillNNormal>::vals;
347template<> SparcFaultBase::FaultVals SparcFault<FillNOther>::vals;
348template<> SparcFaultBase::FaultVals SparcFault<TrapInstruction>::vals;
349
350
351void enterREDState(ThreadContext *tc);
352
353void doREDFault(ThreadContext *tc, TrapType tt);
354
355void doNormalFault(ThreadContext *tc, TrapType tt, bool gotoHpriv);
356
357void getREDVector(RegVal TT, Addr &PC, Addr &NPC);
358
359void getHyperVector(ThreadContext * tc, Addr &PC, Addr &NPC, RegVal TT);
360
361void getPrivVector(ThreadContext *tc, Addr &PC, Addr &NPC, RegVal TT,
362                   RegVal TL);
363
364} // namespace SparcISA
365
366#endif // __SPARC_FAULTS_HH__
367