Searched refs:panic (Results 151 - 175 of 392) sorted by relevance

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/gem5/src/dev/arm/
H A Dgeneric_timer.cc561 panic("Incompatible checkpoint: Only one set of timers supported");
580 panic("Invalid address: 0x%x\n", addr);
590 panic("Unexpected access size: %i\n", size);
601 panic("Unexpected access size\n");
613 panic("Invalid address: 0x%x\n", addr);
656 panic("Invalid access size: %i\n", size);
699 panic("Invalid access size: %i\n", size);
783 panic("Invalid access size: %i\n", size);
849 panic("Invalid access size: %i\n", size);
H A Dvgic.cc80 panic("Read to unknown address %#x\n", pkt->getAddr());
93 panic("Write to unknown address %#x\n", pkt->getAddr());
123 panic("VGIC does not support 'HW' List Register feature (LR %#x)!\n",
134 panic("VGIC VCPU read of bad address %#x\n", daddr);
158 panic("VGIC: Weird unbanked hv ctrl address %#x!\n", daddr);
230 panic("VGIC HVCtrl read of bad address %#x\n", daddr);
275 panic("VGIC VCPU write %#x to unk address %#x\n",
302 panic("VGIC: Weird unbanked hv ctrl address %#x!\n", daddr);
340 panic("VGIC HVCtrl write to bad address %#x\n", daddr);
H A Dgic_v3_its.cc383 panic("Unrecognized command type: %u", command.type);
737 panic("ITS %s command unimplemented", __func__);
743 panic("ITS %s command unimplemented", __func__);
749 panic("ITS %s command unimplemented", __func__);
755 panic("ITS %s command unimplemented", __func__);
761 panic("ITS %s command unimplemented", __func__);
767 panic("ITS %s command unimplemented", __func__);
773 panic("ITS %s command unimplemented", __func__);
883 panic("Unrecognized register access\n");
910 panic("GITS_IID
[all...]
H A Dgic_v2.cc122 panic("Read to unknown address %#x\n", pkt->getAddr());
136 panic("Write to unknown address %#x\n", pkt->getAddr());
160 panic("Invalid size while reading Distributor regs in GIC: %d\n",
220 default: // will panic() after return to caller anyway
285 panic("Tried to read Gic distributor at offset %#x\n", daddr);
380 panic("Need to implement HPIR");
383 panic("Tried to read Gic cpu at offset %#x\n", daddr);
410 panic("Invalid size when writing to priority regs in Gic: %d\n",
497 panic("Invalid size when writing to priority regs in Gic: %d\n",
552 panic("Trie
[all...]
H A Denergy_ctrl.cc141 panic("Tried to read EnergyCtrl at offset %#x / reg %i\n", daddr,
211 panic("Tried to write EnergyCtrl at offset %#x\n", daddr);
H A Dvio_mmio.cc157 panic("Unhandled read offset (0x%x)\n", offset);
256 panic("Unhandled read offset (0x%x)\n", offset);
H A Dgic_v3_distributor.hh197 panic("Gicv3Distributor::groupEnabled(): "
210 panic("Gicv3Distributor::groupEnabled(): "
/gem5/src/cpu/kvm/
H A Dx86_cpu.cc530 panic("KVM: Missing capability (KVM_CAP_SET_TSS_ADDR)\n");
532 panic("KVM: Missing capability (KVM_CAP_EXT_CPUID)\n");
1178 panic("KVM: Unknown interrupt type\n");
1288 panic("Unexpected IO size (%u) for address 0x%x.\n",
1293 panic("Unexpected IO count (%u) for address 0x%x.\n",
1461 panic("KVM: Failed to set guest CPUID2 (errno: %i)\n",
1481 panic("KVM: Failed to set guest MSRs (errno: %i)\n",
1501 panic("KVM: Failed to get guest MSRs (errno: %i)\n",
1563 panic("KVM: Failed to get guest debug registers\n");
1565 panic("KV
[all...]
/gem5/src/dev/pci/
H A Ddevice.cc240 panic("invalid access size(?) for PCI configspace!\n");
243 panic("Out-of-range access to PCI config space!\n");
269 panic("invalid access size(?) for PCI configspace!\n");
303 panic("invalid access size(?) for PCI configspace!\n");
306 panic("Out-of-range access to PCI config space!\n");
329 panic("writing to a read only register");
348 panic("writing to a read only register");
418 panic("invalid access size(?) for PCI configspace!\n");
H A Dcopy_engine.hh102 { panic("CopyEngineChannel has no I/O access\n");}
104 { panic("CopyEngineChannel has no I/O access\n"); }
/gem5/src/dev/sparc/
H A Dmm_disk.cc106 panic("Invalid access size\n");
166 panic("Invalid access size\n");
/gem5/src/mem/cache/tags/indexing_policies/
H A Dskewed_associative.cc127 panic("A skewing function has not been implemented for this way.");
189 panic("A skewing function has not been implemented for this way.");
/gem5/src/cpu/checker/
H A Dcpu_impl.hh117 panic("%lli: Trying to take an interrupt in middle of "
138 panic("%lli: Instruction sn:%lli at PC %s is serializing before but is"
184 panic("%lli: Instruction sn:%lli at PC %s is serializing after but is"
384 panic("%lli: sn: %lli at PC: %s took a fault in checker "
388 panic("%lli: sn: %lli at PC: %s took a fault in driver "
569 // O3 have diverged, so panic is called for now. It may be useful
577 panic("%lli: Instruction PC %#x results didn't match up, copying all "
632 panic("Unknown register class: %d", (int)idx.classValue());
668 panic("Unknown register class: %d", (int)idx.classValue());
/gem5/src/mem/ruby/network/garnet2.0/
H A DRoutingUnit.cc228 panic("x_hops == y_hops == 0");
241 panic("%s placeholder executed", __FUNCTION__);
/gem5/src/cpu/o3/
H A Dfree_list.hh291 panic("Unexpected RegClass (%s)",
324 panic("Unexpected RegClass (%s)",
/gem5/src/arch/arm/
H A Dtable_walker.hh87 panic("texcb() not implemented for this class\n");
91 panic("shareable() not implemented for this class\n");
148 panic("Super sections not implemented\n");
155 panic("Super sections not implemented\n");
164 panic("Super sections not implemented\n");
459 panic("Invalid AArch64 VM granule size\n");
468 panic("Invalid AArch64 VM granule size\n");
471 panic("AArch64 page table entry must be block or page\n");
/gem5/src/arch/alpha/
H A Dvtophys.cc83 panic("vtophys: ptbr is not set on virtual lookup");
/gem5/src/mem/ruby/structures/
H A DWireBuffer.cc86 panic("No Consumer for WireBuffer! %s\n", *this);
/gem5/src/cpu/testers/rubytest/
H A DCheckTable.cc87 panic("Check not aligned");
/gem5/src/dev/net/
H A Dpktfifo.cc54 panic("invalid fifo");
/gem5/src/sim/
H A Dinit_signals.cc98 panic("Failed to setup handler for signal %i\n", signal);
H A Droot.cc144 panic("only one root object allowed!");
/gem5/src/arch/mips/
H A Dtlb.hh101 panic("demapPage unimplemented.\n");
/gem5/src/arch/riscv/
H A Dtlb.hh100 panic("demapPage unimplemented.\n");
H A Dutility.hh147 * disassembly information, so rather than panic the incorrect
168 panic("Not Implemented for Riscv");

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