Searched refs:True (Results 151 - 175 of 290) sorted by relevance
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/gem5/src/systemc/tests/tlm/endian_conv/ |
H A D | testall.py | 103 while True: 128 while True: 308 return True 315 return True 326 return True 334 return True 339 return True 422 first_time = True
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/gem5/tests/configs/ |
H A D | arm_generic.py | 81 use_ruby -- True if ruby is used instead of the classic memory system 97 system.panic_on_panic = True 98 system.panic_on_oops = True
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/gem5/tests/testing/ |
H A D | helpers.py | 92 self._timeout = True 149 return True
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/gem5/util/style/ |
H A D | style.py | 66 while True: 130 return True
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/gem5/configs/example/ |
H A D | fs.py | 104 test_sys.enable_context_switch_stats_dump = True 136 test_sys.have_lpae = True 139 test_sys.have_virtualization = True 152 Ruby.create_system(options, True, test_sys, test_sys.iobus, 343 root = makeDualRoot(True, test_sys, drive_sys, options.etherdump) 357 root = Root(full_system=True, system=test_sys) 363 root.time_sync_enable = True 366 VncServer.frame_capture = True
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H A D | memtest.py | 138 while True: 186 writeback_clean = True) 308 last_subsys.xbar.point_of_coherency = True 311 data_latency = 10, sequential_access = True,
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/gem5/configs/ruby/ |
H A D | MOESI_AMD_Base.py | 110 self.sequencer.is_cpu_sequencer = True 118 self.sequencer1.is_cpu_sequencer = True 192 self.CPUonly = True 209 default=True) 265 dir_cntrl.requestFromCores = MessageBuffer(ordered = True) 280 dir_cntrl.triggerQueue = MessageBuffer(ordered = True) 281 dir_cntrl.L3triggerQueue = MessageBuffer(ordered = True) 325 cp_cntrl.triggerQueue = MessageBuffer(ordered = True)
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H A D | Garnet_standalone.py | 87 garnet_standalone = True,
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/gem5/src/python/m5/util/ |
H A D | jobfile.py | 146 self._is_checkpoint = True 234 def clone(self, suboptions=True): 346 def addfilter(self, filt, pos=True): 360 return True 364 return True 369 for options in self.options(groups, True): 381 for options in self.options(groups, True): 442 both = True 443 checkpoint = True 445 checkpoint = True [all...] |
/gem5/ext/ply/example/closurecalc/ |
H A D | calc.py | 121 while True:
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/gem5/util/stats/ |
H A D | chart.py | 34 'fig_legend' : True,
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/gem5/src/mem/slicc/ast/ |
H A D | EnqueueStatementAST.py | 66 ret_type, rcode = self.latexpr.inline(True)
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H A D | ObjDeclAST.py | 66 rvalue_type,init_code = self.rvalue.inline(True)
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/gem5/src/mem/slicc/symbols/ |
H A D | Transition.py | 44 found = True
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/gem5/configs/dram/ |
H A D | lat_mem_rd.py | 113 system.mmap_using_noreserve = True 126 ctrl.null = True 272 sequential_access = True 283 system.l2cache = L2Cache(size = '512kB', writeback_clean = True)
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/gem5/src/dev/pci/ |
H A D | PciHost.py | 49 abstract = True
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/gem5/src/mem/qos/ |
H A D | QoSPolicy.py | 46 abstract = True
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/gem5/tests/gem5/memory/ |
H A D | simple-run.py | 78 system.monitor.stackdist = StackDistProbe(verify = True)
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/gem5/util/ |
H A D | protolib.py | 142 return True
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H A D | oprofile-top.py | 59 showidle = True
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/gem5/src/cpu/testers/traffic_gen/ |
H A D | BaseTrafficGen.py | 60 abstract = True
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/gem5/src/gpu-compute/ |
H A D | X86GPUTLB.py | 65 allocationPolicy = Param.Bool(True, "Allocate on an access")
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/gem5/src/mem/ |
H A D | CommMonitor.py | 102 disable_addr_dists = Param.Bool(True, "Disable address distributions")
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/gem5/src/mem/cache/tags/ |
H A D | Tags.py | 45 abstract = True
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/gem5/src/sim/ |
H A D | System.py | 108 kernel_addr_check = Param.Bool(True,
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