Searched hist:2009 (Results 676 - 700 of 951) sorted by relevance
/gem5/src/cpu/simple/ | ||
H A D | atomic.cc | diff 6775:db802ee94eb6 Wed Nov 18 16:55:00 EST 2009 Brad Beckmann <Brad.Beckmann@amd.com> m5: Fixed bug in atomic cpu destructor diff 6739:48d10ba361c9 Wed Nov 11 00:10:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> Mem: Eliminate the NO_FAULT request flag. diff 6658:f4de76601762 Wed Sep 23 11:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh diff 6623:f7abbfd5a79f Sun Aug 23 17:15:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Atomic CPU: Respect the NO_ACCESS request flag. diff 6227:a17798f2a52c Fri Jun 05 02:21:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: clean up types, especially signed vs unsigned diff 6221:58a3c04e6344 Tue May 26 12:23:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: add a type for thread IDs and try to use it everywhere diff 6102:7fbf97dc6540 Mon Apr 20 00:44:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Mem: Change isLlsc to isLLSC. diff 6078:aae5ac55c749 Sun Apr 19 07:50:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> CPUs: Make the atomic CPU support locked memory accesses. diff 6076:e141cc7896ce Sun Apr 19 07:25:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Memory: Rename LOCKED for load locked store conditional to LLSC. diff 6043:19852407f5c9 Sun Apr 19 05:23:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> CPU: If the simple CPU is already idle, just return from suspendContext, don't assert. |
/gem5/src/cpu/ | ||
H A D | inst_seq.hh | diff 6712:b95abe00dd9d Wed Nov 04 19:57:00 EST 2009 Nathan Binkert <nate@binkert.org> build: fix compile problems pointed out by gcc 4.4 |
H A D | activity.hh | diff 5804:34fe9bbc6705 Wed Jan 21 17:56:00 EST 2009 Nathan Binkert <nate@binkert.org> o3cpu: give a name to the activity recorder for better tracing |
H A D | exetrace.hh | diff 6216:2f4020838149 Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> includes: sort includes again diff 6214:1ec0ec8933ae Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: Move stuff for global types into src/base/types.hh diff 5866:303e409d88d9 Tue Feb 10 18:49:00 EST 2009 Korey Sewell <ksewell@umich.edu> ExeTrace: Allow subclasses of the tracer to define their own prefix to dump diff 5784:8a28646c4bc2 Wed Jan 07 01:34:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> Tracing: Make tracing aware of macro and micro ops. |
/gem5/src/cpu/pred/ | ||
H A D | ras.hh | 6226:f1076450ab2b Fri Jun 05 00:50:00 EDT 2009 Nathan Binkert <nate@binkert.org> move: put predictor includes and cc files into the same place |
/gem5/src/arch/alpha/ | ||
H A D | pagetable.hh | diff 5877:9fe574944f31 Mon Feb 16 17:47:00 EST 2009 Lisa Hsu <hsul@eecs.umich.edu> sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though. |
H A D | utility.hh | diff 6330:786136379872 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Alpha: Pull the MiscRegFile fully into the ISA object. diff 6329:5d8b91875859 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Registers: Add a registers.hh file as an ISA switched header. This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. diff 6327:f6148086f997 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Alpha: Move reg_redir into its own files, and move some constants into regfile.hh. diff 6325:7a020652cd85 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Alpha: Get rid of function prototypes with no implementations. |
/gem5/src/arch/x86/isa/decoder/ | ||
H A D | x87.isa | diff 6619:de112a8ac3d8 Thu Aug 20 03:42:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Fix the decoding for and fill out FST and FSTP. |
/gem5/src/base/ | ||
H A D | random.hh | diff 6214:1ec0ec8933ae Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: Move stuff for global types into src/base/types.hh |
/gem5/src/dev/alpha/ | ||
H A D | tsunami.hh | diff 5834:b9e30a60dee4 Sun Feb 01 03:02:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> Devices: Add support for legacy fixed IO locations in BARs. |
H A D | tsunami_pchip.hh | diff 5834:b9e30a60dee4 Sun Feb 01 03:02:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> Devices: Add support for legacy fixed IO locations in BARs. |
/gem5/src/mem/slicc/ast/ | ||
H A D | EnqueueStatementAST.py | 6657:ef5fae93a3b2 Tue Sep 22 21:12:00 EDT 2009 Nathan Binkert <nate@binkert.org> slicc: Pure python implementation of slicc. This is simply a translation of the C++ slicc into python with very minimal reorganization of the code. The output can be verified as nearly identical by doing a "diff -wBur". Slicc can easily be run manually by using util/slicc |
H A D | InPortDeclAST.py | 6657:ef5fae93a3b2 Tue Sep 22 21:12:00 EDT 2009 Nathan Binkert <nate@binkert.org> slicc: Pure python implementation of slicc. This is simply a translation of the C++ slicc into python with very minimal reorganization of the code. The output can be verified as nearly identical by doing a "diff -wBur". Slicc can easily be run manually by using util/slicc |
H A D | ObjDeclAST.py | 6657:ef5fae93a3b2 Tue Sep 22 21:12:00 EDT 2009 Nathan Binkert <nate@binkert.org> slicc: Pure python implementation of slicc. This is simply a translation of the C++ slicc into python with very minimal reorganization of the code. The output can be verified as nearly identical by doing a "diff -wBur". Slicc can easily be run manually by using util/slicc |
H A D | FormalParamAST.py | 6657:ef5fae93a3b2 Tue Sep 22 21:12:00 EDT 2009 Nathan Binkert <nate@binkert.org> slicc: Pure python implementation of slicc. This is simply a translation of the C++ slicc into python with very minimal reorganization of the code. The output can be verified as nearly identical by doing a "diff -wBur". Slicc can easily be run manually by using util/slicc |
/gem5/src/mem/slicc/symbols/ | ||
H A D | Func.py | 6657:ef5fae93a3b2 Tue Sep 22 21:12:00 EDT 2009 Nathan Binkert <nate@binkert.org> slicc: Pure python implementation of slicc. This is simply a translation of the C++ slicc into python with very minimal reorganization of the code. The output can be verified as nearly identical by doing a "diff -wBur". Slicc can easily be run manually by using util/slicc |
/gem5/src/dev/mips/ | ||
H A D | malta_io.hh | diff 6379:75d4aaf7dd54 Tue Jul 21 04:09:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> MIPS: Get MIPS_FS to compile, more style fixes. Some breakage was from my BitUnion change, some was much older. |
/gem5/src/cpu/o3/ | ||
H A D | free_list.cc | diff 6221:58a3c04e6344 Tue May 26 12:23:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: add a type for thread IDs and try to use it everywhere |
H A D | scoreboard.cc | diff 6658:f4de76601762 Wed Sep 23 11:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh |
/gem5/src/sim/ | ||
H A D | debug.cc | diff 5882:5a047c3f3795 Mon Feb 23 14:48:00 EST 2009 Nathan Binkert <nate@binkert.org> debug: Move debug_break into src/base |
/gem5/src/arch/mips/linux/ | ||
H A D | process.hh | diff 6650:f23a18fec0ef Thu Sep 17 15:59:00 EDT 2009 Korey Sewell <ksewell@umich.edu> mips: fix command line arguments arguments were not being saved correctly into M5 memory |
/gem5/src/arch/power/ | ||
H A D | SConscript | 6691:cd68b6ecd68d Tue Oct 27 12:24:00 EDT 2009 Timothy M. Jones <tjones1@inf.ed.ac.uk> POWER: Add support for the Power ISA This adds support for the 32-bit, big endian Power ISA. This supports both integer and floating point instructions based on the Power ISA Book I v2.06. |
/gem5/src/arch/mips/isa/formats/ | ||
H A D | dsp.isa | diff 6383:31c067ae3331 Wed Jul 22 02:38:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> MIPS: Format the register index constants like the other ISAs. Also a few more style fixes. |
/gem5/src/arch/x86/isa/formats/ | ||
H A D | basic.isa | diff 5789:46c548dbe620 Wed Jan 07 02:55:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Hook in the M5 pseudo insts. |
/gem5/src/arch/sparc/ | ||
H A D | utility.hh | diff 6335:a08470cb53e5 Thu Jul 09 23:28:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> SPARC: Fold the MiscRegFile all the way into the ISA object. diff 6329:5d8b91875859 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Registers: Add a registers.hh file as an ISA switched header. This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. diff 6320:b90e13cafba4 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> SPARC: Phase out SPARC's intregfile.hh. diff 6283:94c016415053 Sun Jul 05 19:07:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> SPARC: Fix the parenthesis in inUserMode. |
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