Searched hist:2009 (Results 376 - 400 of 951) sorted by relevance

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/gem5/src/cpu/o3/
H A Dimpl.hhdiff 6658:f4de76601762 Wed Sep 23 11:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
H A Dstore_set.hhdiff 6221:58a3c04e6344 Tue May 26 12:23:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: add a type for thread IDs and try to use it everywhere
diff 6216:2f4020838149 Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> includes: sort includes again
diff 6214:1ec0ec8933ae Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: Move stuff for global types into src/base/types.hh
/gem5/src/arch/power/
H A DPowerTLB.py6691:cd68b6ecd68d Tue Oct 27 12:24:00 EDT 2009 Timothy M. Jones <tjones1@inf.ed.ac.uk> POWER: Add support for the Power ISA

This adds support for the 32-bit, big endian Power ISA. This supports both
integer and floating point instructions based on the Power ISA Book I v2.06.
/gem5/src/dev/x86/
H A DI8237.py5818:b47de42ec8b2 Sun Jan 25 23:35:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Add a dummy minimal DMA controller that doesn't do anything.
H A Dintdev.ccdiff 6138:6cbdd76b93db Sun Apr 26 05:09:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Tell the function that sends int messages who to send to instead of figuring it out itself.
diff 6064:46d327d42036 Sun Apr 19 06:54:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Add a function which gets called when an interrupt message has been delivered.
diff 6045:214461cb8abe Sun Apr 19 05:42:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Make code that sends an interrupt from the IO APIC available for IPIs.
diff 5827:ac2c268bf4f1 Sun Feb 01 02:33:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Rework interrupt pins to allow one to many connections.
/gem5/src/arch/x86/isa/insts/simd64/integer/data_transfer/
H A Dmove_non_temporal.pydiff 6595:2aec993cdd8f Mon Aug 17 23:22:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement the mask move instructions.
/gem5/src/arch/x86/isa/insts/simd128/integer/data_transfer/
H A Dmove_non_temporal.pydiff 6595:2aec993cdd8f Mon Aug 17 23:22:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement the mask move instructions.
/gem5/src/mem/ruby/system/
H A DSequencer.ccdiff 6859:5de565c4b7bd Wed Nov 18 12:55:00 EST 2009 Derek Hower <drh5@cs.wisc.edu> ruby: added sequencer stats to track what requests are waiting on
diff 6856:f3caa1cd1d9a Fri Nov 13 10:44:00 EST 2009 Derek Hower <drh5@cs.wisc.edu> ruby: gave ALIASED_REQUEST priority over BUFFER_FULL in sequencer
diff 6850:d480ef5b9028 Mon Sep 21 14:04:00 EDT 2009 Polina Dudnik <pdudnik@gmail.com> Atomics bug fix
diff 6846:60e0df8086f0 Thu Sep 17 18:39:00 EDT 2009 Polina Dudnik <pdudnik@cs.wisc.edu> Functionality migrated to sequencer.
diff 6845:9740ade45962 Tue Sep 15 22:37:00 EDT 2009 Derek Hower <drh5@cs.wisc.edu> ruby: improve libruby_issue_request feedback
diff 6833:38da844de114 Thu Sep 10 22:19:00 EDT 2009 Derek Hower <drh5@cs.wisc.edu> ruby: removed SMT-related Sequencer assert
diff 6829:4169f24434ef Wed Sep 09 01:39:00 EDT 2009 Derek Hower <drh5@cs.wisc.edu> ruby: made Locked read/write atomic requests within ruby
diff 6825:104115ebc206 Fri Aug 21 16:52:00 EDT 2009 pdudnik@gmail.com [mq]: first_patch
diff 6763:5a879a3513dc Wed Nov 18 16:55:00 EST 2009 Brad Beckmann <Brad.Beckmann@amd.com> ruby: Ruby 64-bit address output fixes.
diff 6510:336a194c8500 Sat Aug 15 01:45:00 EDT 2009 pdudnik@gmail.com Made servicing_atomic a counter and added started writes:
a function for setting the flag to indicate that
the rmw_writes started issuing
/gem5/src/arch/x86/
H A Dx86_traits.hhdiff 6479:b9ab1b56391b Fri Aug 07 13:13:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement shift right/left double microops.
This is my best guess as far as what these should do. Other existing microops
use implicit registers, mul1s and mul1u for instance, so this should be ok.
The microop that loads the implicit DoubleBits register would fall into one
of the microop slots for moving to/from special registers.
diff 6216:2f4020838149 Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> includes: sort includes again
diff 6214:1ec0ec8933ae Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: Move stuff for global types into src/base/types.hh
H A Dpagetable.hhdiff 6216:2f4020838149 Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> includes: sort includes again
diff 6214:1ec0ec8933ae Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: Move stuff for global types into src/base/types.hh
diff 5877:9fe574944f31 Mon Feb 16 17:47:00 EST 2009 Lisa Hsu <hsul@eecs.umich.edu> sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though.
H A Dcpuid.ccdiff 6068:f70c90e29577 Sun Apr 19 07:13:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Fix the ordering of the vendor string reported by CPUID.
diff 6052:2b660729f136 Sun Apr 19 06:11:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Only use %eax to select a function and look like we support sse2.
diff 6040:818914aeebc1 Sun Apr 19 05:06:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Don't pretend to be an AMD CPU any more. We're not good enough at it.
/gem5/src/dev/
H A Dintel_8254_timer.hhdiff 6216:2f4020838149 Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> includes: sort includes again
diff 6214:1ec0ec8933ae Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: Move stuff for global types into src/base/types.hh
diff 6067:c633cdd5ca25 Sun Apr 19 06:56:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Keep track of what the initial count value was in the LAPIC timer.
/gem5/src/mem/slicc/ast/
H A DMethodCallExprAST.pydiff 6780:2d3fc2e6f368 Wed Nov 18 16:55:00 EST 2009 Brad Beckmann <Brad.Beckmann@amd.com> ruby: slicc method error fix
Added error message when a method call is not supported by an object.
diff 6690:4dc4e494e4d8 Mon Oct 26 20:06:00 EDT 2009 Brad Beckmann <Brad.Beckmann@amd.com> fixed error message generation bug in SLICC ast files
6657:ef5fae93a3b2 Tue Sep 22 21:12:00 EDT 2009 Nathan Binkert <nate@binkert.org> slicc: Pure python implementation of slicc.
This is simply a translation of the C++ slicc into python with very minimal
reorganization of the code. The output can be verified as nearly identical
by doing a "diff -wBur".

Slicc can easily be run manually by using util/slicc
/gem5/src/base/
H A Dinet.hhdiff 6216:2f4020838149 Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> includes: sort includes again
diff 6214:1ec0ec8933ae Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: Move stuff for global types into src/base/types.hh
diff 5782:ff12aefd2cc2 Tue Jan 06 10:36:00 EST 2009 Ali Saidi <saidi@eecs.umich.edu> INET: Add functions to header types to get offset in packet and start of payload; add function to split packet at last known header
/gem5/src/arch/x86/insts/
H A Dmicroregop.ccdiff 6440:78d25904f66a Wed Aug 05 05:56:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Fix how the parity flag is computed.
It's only for the lowest order byte, and I had the polarity wrong.
diff 6361:62de7e765286 Fri Jul 17 21:49:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Set up a named constant for the "fold bit" for int register indices.
diff 5836:96b77f1f419a Sun Feb 01 03:08:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Calculate flags based on the actual result.
/gem5/src/arch/x86/isa/
H A Dspecialize.isadiff 6519:36369ba5fad6 Mon Aug 17 21:15:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Ignore the size part of XMM/MMX operands. The instructions know what they want.
diff 6518:1ad4a7774b3c Mon Aug 17 21:15:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Use suffixes to differentiate XMM/MMX/GPR operands.
diff 5788:6d4161a36ca1 Wed Jan 07 01:55:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Autogenerate macroop generateDisassemble function.
/gem5/src/unittest/
H A Dstattest.ccdiff 6214:1ec0ec8933ae Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: Move stuff for global types into src/base/types.hh
diff 5999:3cf8e71257e0 Thu Mar 05 22:09:00 EST 2009 Nathan Binkert <nate@binkert.org> stats: Fix all stats usages to deal with template fixes
diff 5885:1db89432381b Mon Feb 23 03:04:00 EST 2009 Nathan Binkert <nate@binkert.org> stats: clean up the statistics unittest
/gem5/src/arch/alpha/
H A Disa.ccdiff 6678:34191eea18c1 Sat Oct 17 04:13:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ISA: Fix compilation.
diff 6330:786136379872 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Alpha: Pull the MiscRegFile fully into the ISA object.
6313:95f69a436c82 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Registers: Add an ISA object which replaces the MiscRegFile.
This object encapsulates (or will eventually) the identity and characteristics
of the ISA in the CPU.
/gem5/src/arch/arm/insts/
H A Dmem.ccdiff 6307:067515d22824 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Improve memory instruction disassembly.
diff 6262:43950710afdc Sat Jun 27 03:29:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Write a function for printing mnemonics and predicates.
6253:988a001820f8 Sun Jun 21 20:21:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Simplify the ISA desc by pulling some classes out of it.
/gem5/src/kern/linux/
H A Dlinux.ccdiff 6712:b95abe00dd9d Wed Nov 04 19:57:00 EST 2009 Nathan Binkert <nate@binkert.org> build: fix compile problems pointed out by gcc 4.4
diff 6227:a17798f2a52c Fri Jun 05 02:21:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: clean up types, especially signed vs unsigned
5795:72ce7502dc71 Sat Jan 17 18:56:00 EST 2009 Ali Saidi <saidi@eecs.umich.edu> Fix issue 326: glibc non-deterministic because it reads /proc
/gem5/src/mem/ruby/profiler/
H A DProfiler.ccdiff 6433:0f0f0fbef977 Mon Jul 27 22:43:00 EDT 2009 Derek Hower <drh5@cs.wisc.edu> ruby: removed unused/incorrect profiler state
diff 6374:11423b4639c0 Mon Jul 20 10:40:00 EDT 2009 Derek Hower <drh5@cs.wisc.edu> ruby: moved cache stats from Profiler to CacheMemory

Caches are now responsible for their own statistic gathering. This
requires a direct callback from the protocol on misses, and so all
future protocols need to take this into account.
diff 6372:f1a41ea3bbab Sat Jul 18 19:20:00 EDT 2009 Derek Hower <drh5@cs.wisc.edu> ruby: removed all refs to old RubyConfig
diff 6288:083a6806dd96 Mon Jul 06 18:49:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: apply some fixes that were overwritten by the recent ruby import.
diff 6285:ce086eca1ede Mon Jul 06 18:49:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Import the latest ruby changes from gems.
This was done with an automated process, so there could be things that were
done in this tree in the past that didn't make it. One known regression
is that atomic memory operations do not seem to work properly anymore.
diff 6284:a63d1dc4c820 Mon Jul 06 18:49:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: replace strings that were missed in original ruby import.
diff 6160:91e31308be1e Mon May 11 13:38:00 EDT 2009 Polina Dudnik <pdudnik@gmail.com> ruby: Remove transactional access types (e.g. LD_XACT) from CacheRequestType

1. Modified enumeration
2. Also modified profiler
3. Remove transactions from Tester
4. Edited XACT_MEM out of Synthetic Driver
diff 6156:76de2027b8ad Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: clean up a few warnings
diff 6154:6bb54dcb940e Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Make ruby #includes use full paths to the files they're including.
This basically means changing all #include statements and changing
autogenerated code so that it generates the correct paths. Because
slicc generates #includes, I had to hard code the include paths to
mem/protocol.
diff 6153:0011560d49b0 Mon May 11 13:38:00 EDT 2009 Dan Gibson <gibson@cs.wisc.edu> ruby: remove unnecessary code.

1) Removing files from the ruby build left some unresovled
symbols. Those have been fixed.

2) Most of the dependencies on Simics data types and the simics
interface files have been removed.

3) Almost all mention of opal is gone.

4) Huge chunks of LogTM are now gone.

5) Handling 1-4 left ~hundreds of unresolved references, which were
fixed, yielding a snowball effect (and the massive size of this
delta).
H A DAccessTraceForAddress.hhdiff 6372:f1a41ea3bbab Sat Jul 18 19:20:00 EDT 2009 Derek Hower <drh5@cs.wisc.edu> ruby: removed all refs to old RubyConfig
diff 6154:6bb54dcb940e Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Make ruby #includes use full paths to the files they're including.
This basically means changing all #include statements and changing
autogenerated code so that it generates the correct paths. Because
slicc generates #includes, I had to hard code the include paths to
mem/protocol.
6145:15cca6ab723a Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Import ruby and slicc from GEMS

We eventually plan to replace the m5 cache hierarchy with the GEMS
hierarchy, but for now we will make both live alongside eachother.
/gem5/src/base/stats/
H A Dtext.hhdiff 6128:fdfbd4c6e449 Wed Apr 22 16:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> stats: Rename the info classes to hopefully make things a bit clearer
FooInfoBase became FooInfo
FooInfo became FooInfoProxy
diff 6126:5f32f9e3c65a Wed Apr 22 13:25:00 EDT 2009 Nathan Binkert <nate@binkert.org> stats: remove simplescalar compatibility for printing
diff 5886:12431dc9a30a Mon Feb 23 03:22:00 EST 2009 Nathan Binkert <nate@binkert.org> stats: Try to make the names of things more intuitive.
Basically, this means renaming several things called data to info, which
is information about the statistics. Things that are named data now are
actual data stored for the statistic.
/gem5/src/arch/arm/isa/
H A Doperands.isadiff 6746:7d2767d7896f Sat Nov 14 22:22:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> ARM: More accurately describe the effects of using the control operands.
diff 6745:cdc62b81747e Sat Nov 14 22:22:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Hook up the moded versions of the SPSR.

These registers can be accessed directly, or through MISCREG_SPSR which will
act as whichever SPSR is appropriate for the current mode.
diff 6741:73d89772f409 Wed Nov 11 02:44:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Fix some bugs in the ISA desc and fill out some instructions.
diff 6724:70129fdded75 Sun Nov 08 05:08:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Split the condition codes out of the CPSR.

This allows those bits to be renamed while allowing the other fields to
control the behavior of the processor.
diff 6721:77318ac91316 Sun Nov 08 04:59:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Add back in spots for Rhi and Rlo, and use a named constant for LR.
diff 6720:36aa46630e62 Sun Nov 08 04:57:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Get rid of the Raddr operand.
diff 6403:c3372644e033 Mon Jul 27 03:53:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Add in spots for the VFP control registers.
diff 6393:1895318a1b26 Mon Jul 27 03:51:00 EDT 2009 Ali Saidi <saidi@eecs.umich.edu> ARM: Handle register indexed system calls.
diff 6312:94b1a249422e Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Use custom read/write code to alias R15 with the PC.
diff 6308:46fcf4dc4c30 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Move the integer microops out of the decoder and into the ISA desc.
/gem5/src/cpu/
H A Dnativetrace.hhdiff 6409:6eaa041d043e Mon Jul 27 03:54:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Make native trace print out what instruction caused an error.
diff 6365:a3037fa327a0 Mon Jul 20 02:54:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> CPU: Separate out native trace into ISA (in)dependent code and SimObjects.
diff 6216:2f4020838149 Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> includes: sort includes again
diff 6214:1ec0ec8933ae Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> types: Move stuff for global types into src/base/types.hh
diff 5784:8a28646c4bc2 Wed Jan 07 01:34:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> Tracing: Make tracing aware of macro and micro ops.

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