Searched defs:system (Results 26 - 50 of 117) sorted by relevance

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/gem5/tests/configs/
H A Do3-timing-mp-ruby.py39 system = System(cpu = cpus, physmem = ruby_memory, membus = SystemXBar(), variable
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H A Dsimple-atomic-mp-ruby.py39 system = System(cpu = cpus, physmem = ruby_memory, membus = SystemXBar(), variable
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H A Do3-timing-ruby.py37 system = System(cpu = cpu, variable
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H A Dmemtest-filter.py39 system = System(cpu = cpus, variable
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/gem5/configs/learning_gem5/part1/
H A Dtwo_level.py84 system = System() variable
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H A Dsimple.py50 system = System() variable
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/gem5/configs/learning_gem5/part3/
H A Dsimple_ruby.py57 system = System() variable
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/gem5/configs/learning_gem5/part2/
H A Dsimple_cache.py45 system = System() variable
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H A Dsimple_memobj.py45 system = System() variable
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/gem5/src/mem/
H A DExternalMaster.py56 system = Param.System(Parent.any, 'System this external port belongs to') variable in class:ExternalMaster
/gem5/src/dev/arm/
H A Drealview.hh63 System *system; member in class:RealView
/gem5/configs/example/
H A Dhmc_hello.py52 system = System() variable
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H A Detrace_replay.py83 system = System(cpu = CPUClass(cpu_id=0), variable
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H A Druby_direct_test.py93 system = System(mem_ranges = [AddrRange(options.mem_size)]) variable
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H A Druby_gpu_random_test.py130 system = System(cpu=tester, mem_ranges=[AddrRange(options.mem_size)]) variable
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/gem5/src/dev/alpha/
H A DAlphaBackdoor.py42 system = Param.AlphaSystem(Parent.any, "system object") variable in class:AlphaBackdoor
H A Dtsunami.hh63 System *system; member in class:Tsunami
H A Dbackdoor.hh95 AlphaSystem *system; member in class:AlphaBackdoor
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/gem5/src/mem/probes/
H A DStackDistProbe.py47 system = Param.System(Parent.any, variable in class:StackDistProbe
/gem5/tests/gem5/memory/
H A Dmemtest-run.py40 system = System(cpu = cpus, variable
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/gem5/src/arch/x86/
H A DX86TLB.py49 system = Param.System(Parent.any, "system object") variable in class:X86PagetableWalker
/gem5/src/learning_gem5/part2/
H A DSimpleCache.py47 system = Param.System(Parent.any, "The system this cache is part of") variable in class:SimpleCache
/gem5/ext/mcpat/
H A Dmain.cc88 System* system = new System(&system_xml); local
/gem5/util/tlm/src/
H A Dsc_master_port.hh100 System* system; member in class:Gem5SystemC::SCMasterPort
/gem5/src/arch/arm/kvm/
H A Dgic.hh197 System &system; member in class:MuxingKvmGic

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