1# Copyright (c) 2010-2015 Advanced Micro Devices, Inc. 2# All rights reserved. 3# 4# For use for simulation and test purposes only 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are met: 8# 9# 1. Redistributions of source code must retain the above copyright notice, 10# this list of conditions and the following disclaimer. 11# 12# 2. Redistributions in binary form must reproduce the above copyright notice, 13# this list of conditions and the following disclaimer in the documentation 14# and/or other materials provided with the distribution. 15# 16# 3. Neither the name of the copyright holder nor the names of its 17# contributors may be used to endorse or promote products derived from this 18# software without specific prior written permission. 19# 20# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 24# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30# POSSIBILITY OF SUCH DAMAGE. 31# 32# Authors: Brad Beckmann 33 34from __future__ import print_function 35from __future__ import absolute_import 36 37import m5 38from m5.objects import * 39from m5.defines import buildEnv 40from m5.util import addToPath 41import os, optparse, sys 42 43addToPath('../') 44 45from common import Options 46from ruby import Ruby 47 48# Get paths we might need. 49config_path = os.path.dirname(os.path.abspath(__file__)) 50config_root = os.path.dirname(config_path) 51m5_root = os.path.dirname(config_root) 52 53parser = optparse.OptionParser() 54Options.addNoISAOptions(parser) 55 56parser.add_option("--maxloads", metavar="N", default=100, 57 help="Stop after N loads") 58parser.add_option("-f", "--wakeup_freq", metavar="N", default=10, 59 help="Wakeup every N cycles") 60parser.add_option("-u", "--num-compute-units", type="int", default=1, 61 help="number of compute units in the GPU") 62parser.add_option("--num-cp", type="int", default=0, 63 help="Number of GPU Command Processors (CP)") 64# not super important now, but to avoid putting the number 4 everywhere, make 65# it an option/knob 66parser.add_option("--cu-per-sqc", type="int", default=4, help="number of CUs \ 67 sharing an SQC (icache, and thus icache TLB)") 68parser.add_option("--simds-per-cu", type="int", default=4, help="SIMD units" \ 69 "per CU") 70parser.add_option("--wf-size", type="int", default=64, 71 help="Wavefront size(in workitems)") 72parser.add_option("--wfs-per-simd", type="int", default=10, help="Number of " \ 73 "WF slots per SIMD") 74 75# 76# Add the ruby specific and protocol specific options 77# 78Ruby.define_options(parser) 79 80exec(compile( \ 81 open(os.path.join(config_root, "common", "Options.py")).read(), \ 82 os.path.join(config_root, "common", "Options.py"), 'exec')) 83 84(options, args) = parser.parse_args() 85 86# 87# Set the default cache size and associativity to be very small to encourage 88# races between requests and writebacks. 89# 90options.l1d_size="256B" 91options.l1i_size="256B" 92options.l2_size="512B" 93options.l3_size="1kB" 94options.l1d_assoc=2 95options.l1i_assoc=2 96options.l2_assoc=2 97options.l3_assoc=2 98 99# This file can support multiple compute units 100assert(options.num_compute_units >= 1) 101n_cu = options.num_compute_units 102 103options.num_sqc = int((n_cu + options.cu_per_sqc - 1) // options.cu_per_sqc) 104 105if args: 106 print("Error: script doesn't take any positional arguments") 107 sys.exit(1) 108 109# 110# Create the ruby random tester 111# 112 113# Check to for the GPU_RfO protocol. Other GPU protocols are non-SC and will 114# not work with the Ruby random tester. 115assert(buildEnv['PROTOCOL'] == 'GPU_RfO') 116 117# The GPU_RfO protocol does not support cache flushes 118check_flush = False 119 120tester = RubyTester(check_flush=check_flush, 121 checks_to_complete=options.maxloads, 122 wakeup_frequency=options.wakeup_freq, 123 deadlock_threshold=1000000) 124 125# 126# Create the M5 system. Note that the Memory Object isn't 127# actually used by the rubytester, but is included to support the 128# M5 memory size == Ruby memory size checks 129# 130system = System(cpu=tester, mem_ranges=[AddrRange(options.mem_size)]) 131 132# Create a top-level voltage domain and clock domain 133system.voltage_domain = VoltageDomain(voltage=options.sys_voltage) 134 135system.clk_domain = SrcClockDomain(clock=options.sys_clock, 136 voltage_domain=system.voltage_domain) 137 138Ruby.create_system(options, False, system) 139 140# Create a seperate clock domain for Ruby 141system.ruby.clk_domain = SrcClockDomain(clock=options.ruby_clock, 142 voltage_domain=system.voltage_domain) 143 144tester.num_cpus = len(system.ruby._cpu_ports) 145 146# 147# The tester is most effective when randomization is turned on and 148# artifical delay is randomly inserted on messages 149# 150system.ruby.randomization = True 151 152for ruby_port in system.ruby._cpu_ports: 153 154 # 155 # Tie the ruby tester ports to the ruby cpu read and write ports 156 # 157 if ruby_port.support_data_reqs and ruby_port.support_inst_reqs: 158 tester.cpuInstDataPort = ruby_port.slave 159 elif ruby_port.support_data_reqs: 160 tester.cpuDataPort = ruby_port.slave 161 elif ruby_port.support_inst_reqs: 162 tester.cpuInstPort = ruby_port.slave 163 164 # Do not automatically retry stalled Ruby requests 165 ruby_port.no_retry_on_stall = True 166 167 # 168 # Tell each sequencer this is the ruby tester so that it 169 # copies the subblock back to the checker 170 # 171 ruby_port.using_ruby_tester = True 172 173# ----------------------- 174# run simulation 175# ----------------------- 176 177root = Root( full_system = False, system = system ) 178root.system.mem_mode = 'timing' 179 180# Not much point in this being higher than the L1 latency 181m5.ticks.setGlobalFrequency('1ns') 182 183# instantiate configuration 184m5.instantiate() 185 186# simulate until program terminates 187exit_event = m5.simulate(options.abs_max_tick) 188 189print('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()) 190