Searched refs:va (Results 1 - 25 of 37) sorted by relevance

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/gem5/src/arch/alpha/
H A Dremote_gdb.cc155 * Determine if the mapping at va..(va+len) is valid.
158 RemoteGDB::acc(Addr va, size_t len) argument
165 va = TruncPage(va);
166 last_va = RoundPage(va + len);
169 if (IsK0Seg(va)) {
170 if (va < (K0SegBase + system()->memSize())) {
172 "%#x < K0SEG + size\n", va);
176 "> K0SEG + size\n", va);
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/gem5/src/arch/generic/
H A Dmmapped_ipr.cc58 Addr va(pkt->getAddr());
59 Addr cls(va >> IPR_CLASS_SHIFT);
66 panic("Unhandled generic IPR read: 0x%x\n", va);
75 Addr va(pkt->getAddr());
76 Addr cls(va >> IPR_CLASS_SHIFT);
83 panic("Unhandled generic IPR write: 0x%x\n", va);
/gem5/src/arch/sparc/
H A Dtlb_map.hh60 i->first.va < r.va + r.size &&
61 i->first.va+i->first.size >= r.va &&
77 if (i->first.va <= r.va+r.size &&
78 i->first.va+i->first.size >= r.va)
158 std::cout << std::hex << i->first.va << " " << i->first.size << " " <<
H A Dtlb.cc97 TLB::insert(Addr va, int partition_id, int context_id, bool real, argument
106 va &= ~(PTE.size()-1);
107 /* tr.va = va;
115 "TLB: Inserting Entry; va=%#x pa=%#x pid=%d cid=%d r=%d entryid=%d\n",
116 va, PTE.paddr(), partition_id, context_id, (int)real, entry);
122 tlb[x].range.va < va + PTE.size() - 1 &&
123 tlb[x].range.va + tlb[x].range.size >= va
198 lookup(Addr va, int partition_id, bool real, int context_id, bool update_used) argument
256 demapPage(Addr va, int partition_id, bool real, int context_id) argument
863 Addr va = pkt->getAddr(); local
1049 Addr va = pkt->getAddr(); local
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H A Dpagetable.cc41 SERIALIZE_SCALAR(range.va);
58 UNSERIALIZE_SCALAR(range.va);
H A Dpagetable.hh68 Addr va() const { assert(populated); return bits(entry,41,0); } function in class:SparcISA::TteTag
185 Addr va; member in struct:SparcISA::TlbRange
211 if (va < r2.va)
219 return va == r2.va &&
254 range.va = vaddr;
277 range.va = new_vaddr;
H A Dtlb.hh110 * @param va the virtual address not shifted (e.g. bottom 13 bits are 0)
115 * entries on not useful if we are trying to do a va->pa without
119 TlbEntry *lookup(Addr va, int partition_id, bool real, int context_id = 0,
140 * va). */
141 void demapPage(Addr va, int partition_id, bool real, int context_id);
144 bool validVirtualAddress(Addr va, bool am);
152 void writeTagAccess(Addr va, int context);
H A Dremote_gdb.cc157 // Determine if the mapping at va..(va+len) is valid.
160 RemoteGDB::acc(Addr va, size_t len) argument
163 // from va to va + len have valid page map entries. Not
166 return va != 0;
170 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
H A Dvtophys.cc115 if (ttetag.valid() && ttetag.va() == va_tag) {
/gem5/src/dev/arm/
H A Dsmmu_v3_ptops.cc89 V7LPageTableOps::index(Addr va, unsigned level) const argument
95 case 1: return bits(va, 26+n, 30) << 3; break;
96 case 2: return bits(va, 29, 21) << 3; break;
97 case 3: return bits(va, 20, 12) << 3; break;
183 V8PageTableOps4k::index(Addr va, unsigned level) const argument
186 case 0: return bits(va, 47, 39) << 3; break;
187 case 1: return bits(va, 38, 30) << 3; break;
188 case 2: return bits(va, 29, 21) << 3; break;
189 case 3: return bits(va, 20, 12) << 3; break;
281 V8PageTableOps16k::index(Addr va, unsigne argument
379 index(Addr va, unsigned level) const argument
[all...]
H A Dsmmu_v3_caches.hh110 Addr va; member in struct:SMMUTLB::Entry
127 const Entry *lookup(uint32_t sid, uint32_t ssid, Addr va,
135 void invalidateVA(Addr va, uint16_t asid, uint16_t vmid);
136 void invalidateVAA(Addr va, uint16_t vmid);
148 size_t pickSetIdx(Addr va) const;
161 Addr va; member in struct:ARMArchTLB::Entry
175 const Entry *lookup(Addr va, uint16_t asid, uint16_t vmid,
180 void invalidateVA(Addr va, uint16_t asid, uint16_t vmid);
181 void invalidateVAA(Addr va, uint16_t vmid);
192 size_t pickSetIdx(Addr va, uint16_
292 Addr va; member in struct:WalkCache::Entry
[all...]
H A Dsmmu_v3_ptops.hh55 virtual Addr index(Addr va, unsigned level) const = 0;
68 Addr index(Addr va, unsigned level) const override;
81 Addr index(Addr va, unsigned level) const override;
94 Addr index(Addr va, unsigned level) const override;
107 Addr index(Addr va, unsigned level) const override;
H A Dsmmu_v3_caches.cc180 Addr va, bool updStats)
184 Set &set = sets[pickSetIdx(va)];
189 if (e.valid && (e.va & e.vaMask) == (va & e.vaMask) &&
248 lookup(incoming.sid, incoming.ssid, incoming.va, false);
253 Set &set = sets[pickSetIdx(incoming.va)];
289 SMMUTLB::invalidateVA(Addr va, uint16_t asid, uint16_t vmid) argument
291 Set &set = sets[pickSetIdx(va)];
296 if ((e.va & e.vaMask) == (va
179 lookup(uint32_t sid, uint32_t ssid, Addr va, bool updStats) argument
305 invalidateVAA(Addr va, uint16_t vmid) argument
459 lookup(Addr va, uint16_t asid, uint16_t vmid, bool updStats) argument
513 invalidateVA(Addr va, uint16_t asid, uint16_t vmid) argument
529 invalidateVAA(Addr va, uint16_t vmid) argument
585 pickSetIdx(Addr va, uint16_t asid, uint16_t vmid) const argument
765 pickSetIdx(Addr va, uint16_t vmid) const argument
1014 lookup(Addr va, Addr vaMask, uint16_t asid, uint16_t vmid, unsigned stage, unsigned level, bool updStats) argument
1086 invalidateVA(Addr va, uint16_t asid, uint16_t vmid, const bool leaf_only) argument
1105 invalidateVAA(Addr va, uint16_t vmid, const bool leaf_only) argument
1164 pickSetIdx(Addr va, Addr vaMask, unsigned stage, unsigned level) const argument
[all...]
H A Dsmmu_v3_transl.hh125 void walkCacheUpdate(Yield &yield, Addr va, Addr vaMask, Addr pa,
173 void doReadPTE(Yield &yield, Addr va, Addr addr, void *ptr,
/gem5/src/sim/
H A Dfaults.hh99 GenericPageTableFault(Addr va) : vaddr(va) {} argument
111 GenericAlignmentFault(Addr va) : vaddr(va) {} argument
/gem5/src/arch/riscv/
H A Dremote_gdb.cc157 RemoteGDB::acc(Addr va, size_t len) argument
160 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
/gem5/src/arch/x86/
H A Dtlb.hh74 TlbEntry *lookup(Addr va, bool update_lru = true);
80 EntryList::iterator lookupIt(Addr va, bool update_lru = true);
91 void demapPage(Addr va, uint64_t asn) override;
H A Dremote_gdb.cc72 RemoteGDB::acc(Addr va, size_t len) argument
78 Fault fault = walker->startFunctional(context(), va, logBytes,
83 Addr endVa = va + len - 1;
84 if ((va & ~mask(logBytes)) == (endVa & ~mask(logBytes)))
91 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
/gem5/src/arch/arm/
H A Dpagetable.hh193 match(Addr va, uint8_t _vmid, bool hypLookUp, bool secure_lookup, argument
196 return match(va, 0, _vmid, hypLookUp, secure_lookup, true, target_el);
200 match(Addr va, uint16_t asn, uint8_t _vmid, bool hypLookUp, argument
206 if (valid && va >= v && va <= v + size && (secure_lookup == !nstid) &&
232 pAddr(Addr va) const
234 return (pfn << N) | (va & size);
H A Dinterrupts.hh140 if (!(intStatus || hcr.va || hcr.vi || hcr.vf))
152 (hcr.va && allowVAbort)) )
164 (hcr.va && allowVAbort) ||
185 virtWake |= hcr.va && hcr.amo;
201 isr.a = (useHcrMux & hcr.amo) ? hcr.va : interrupts[INT_ABT];
255 if (hcr.va && allowVAbort)
H A Dremote_gdb.cc179 * Determine if the mapping at va..(va+len) is valid.
182 RemoteGDB::acc(Addr va, size_t len) argument
185 for (ChunkGenerator gen(va, len, PageBytes); !gen.done(); gen.next()) {
187 DPRINTF(GDBAcc, "acc: %#x mapping is invalid\n", va);
192 DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va);
197 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
H A Dtable_walker.hh152 Addr paddr(Addr va) const
156 return mbits(data, 31, 20) | mbits(va, 19, 0);
338 Addr paddr(Addr va) const
341 return mbits(data, 31, 16) | mbits(va, 15, 0);
343 return mbits(data, 31, 12) | mbits(va, 11, 0);
484 Addr paddr(Addr va) const
488 return mbits(data, 47, n) | mbits(va, n - 1, 0);
489 return mbits(data, 39, n) | mbits(va, n - 1, 0);
511 Addr nextDescAddr(Addr va) const
519 pa = nextTableAddr() | (bits(va, va_h
[all...]
/gem5/src/arch/mips/
H A Dremote_gdb.cc160 * Determine if the mapping at va..(va+len) is valid.
163 RemoteGDB::acc(Addr va, size_t len) argument
168 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
/gem5/src/arch/power/
H A Dremote_gdb.cc160 * Determine if the mapping at va..(va+len) is valid.
163 RemoteGDB::acc(Addr va, size_t len) argument
171 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
/gem5/src/gpu-compute/
H A Dgpu_tlb.hh121 TlbEntry *lookup(Addr va, bool update_lru=true);
125 EntryList::iterator lookupIt(Addr va, bool update_lru=true);
132 void demapPage(Addr va, uint64_t asn);

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