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13344:0d881accc3ee |
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15-Oct-2018 |
Gabe Black <gabeblack@google.com> |
arch: Include some additional headers in arch/generic/mmapped_ipr.cc.
These had been included transitively before.
Change-Id: Ie420bc957e9abb5cd01fcf720fc1fda619d210f0 Reviewed-on: https://gem5-review.googlesource.com/c/13538 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
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13234:dea0fbed3f19 |
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12-Oct-2018 |
Gabe Black <gabeblack@google.com> |
arch: Explicitly specify the endianness in the generic mem helpers.
This avoids using the accessors which automatically assume an endianness, requiring the memory system to know what the guest ISA is.
Change-Id: I863fa4116f00e77b801a2f8ea2fbe34e7f55fd5f Reviewed-on: https://gem5-review.googlesource.com/c/13461 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
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11793:ef606668d247 |
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09-Nov-2016 |
Brandon Potter <brandon.potter@amd.com> |
style: [patch 1/22] use /r/3648/ to reorganize includes
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9911:676d3dcf1cc2 |
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15-Oct-2013 |
Andreas Sandberg <andreas@sandberg.pp.se> |
mem: Use a flag instead of address bit 63 for generic IPRs
Using address bit 63 to identify generic IPRs caused problems on SPARC, where IPRs are heavily used. This changeset redefines how generic IPRs are identified. Instead of using bit 63, we now use a separate flag (GENERIC_IPR) a memory request.
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9897:e105fbf799e7 |
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29-Sep-2013 |
Andreas Sandberg <andreas@sandberg.pp.se> |
arch: Add support for m5ops using mmapped IPRs
In order to support m5ops on virtualized CPUs, we need to either intercept hypercall instructions or provide a memory mapped m5ops interface. Since KVM does not normally pass the results of hypercalls to userspace, which makes that method unfeasible. This changeset introduces support for m5ops using memory mapped mmapped IPRs. This is implemented by adding a class of "generic" IPRs which are handled by architecture-independent code. Such IPRs always have bit 63 set and are handled by handleGenericIprRead() and handleGenericIprWrite(). Platform specific impementations of handleIprRead and handleIprWrite should use GenericISA::isGenericIprAccess to determine if an IPR address should be handled by the generic code instead of the architecture-specific code. Platforms that don't need their own IPR support can reuse GenericISA::handleIprRead() and GenericISA::handleIprWrite().
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