Searched refs:iss (Results 1 - 12 of 12) sorted by relevance

/gem5/src/base/
H A Drandom.cc95 std::istringstream iss(state);
96 iss >> gen;
/gem5/src/arch/arm/
H A Dutility.hh285 mcrMrcIssExtract(uint32_t iss, bool &isRead, uint32_t &crm, IntRegIndex &rt, argument
288 isRead = (iss >> 0) & 0x1;
289 crm = (iss >> 1) & 0xF;
290 rt = (IntRegIndex) ((iss >> 5) & 0xF);
291 crn = (iss >> 10) & 0xF;
292 opc1 = (iss >> 14) & 0x7;
293 opc2 = (iss >> 17) & 0x7;
321 mcrMrc15TrapToHyp(const MiscRegIndex miscReg, ThreadContext *tc, uint32_t iss);
325 HDCR hdcr, HSTR hstr, HCPTR hcptr, uint32_t iss);
328 HCR hcr, uint32_t iss);
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H A Dfaults.hh234 virtual uint32_t iss() const = 0;
274 uint32_t iss() const override { return issRaw; }
315 uint32_t iss() const override;
333 uint32_t iss() const override;
346 uint32_t iss() const override;
363 uint32_t iss() const override;
449 uint32_t iss() const override;
501 uint32_t iss() const override;
H A Dutility.cc462 mcrMrc15TrapToHyp(const MiscRegIndex miscReg, ThreadContext *tc, uint32_t iss) argument
480 mcrMrcIssExtract(iss, isRead, crm, rt, crn, opc1, opc2);
603 HDCR hdcr, HSTR hstr, HCPTR hcptr, uint32_t iss)
614 mcrMrcIssExtract(iss, isRead, crm, rt, crn, opc1, opc2);
653 HCR hcr, uint32_t iss)
667 mcrMrcIssExtract(iss, isRead, crm, rt, crn, opc1, opc2);
602 mcrMrc14TrapToHyp(const MiscRegIndex miscReg, HCR hcr, CPSR cpsr, SCR scr, HDCR hdcr, HSTR hstr, HCPTR hcptr, uint32_t iss) argument
652 mcrrMrrc15TrapToHyp(const MiscRegIndex miscReg, CPSR cpsr, SCR scr, HSTR hstr, HCR hcr, uint32_t iss) argument
H A Dfaults.cc387 uint32_t issVal = iss();
810 UndefinedInstruction::iss() const function in class:ArmISA::UndefinedInstruction
813 // If UndefinedInstruction is routed to hypervisor, iss field is 0.
889 SupervisorCall::iss() const function in class:ArmISA::SupervisorCall
897 SecureMonitorCall::iss() const function in class:ArmISA::SecureMonitorCall
1022 SupervisorTrap::iss() const function in class:ArmISA::SupervisorTrap
1024 // If SupervisorTrap is routed to hypervisor, iss field is 0.
1207 AbortFault<T>::iss() const function in class:ArmISA::AbortFault
1366 DataAbort::iss() const function in class:ArmISA::DataAbort
1371 val = AbortFault<DataAbort>::iss();
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H A Disa.cc1776 newVal |= ((armFault->iss() >> 7) & 0x1) << 8;
2035 newVal |= ((armFault->iss() >> 7) & 0x1) << 8;
/gem5/src/base/loader/
H A Decoff_object.cc125 if (entry->iss != -1)
126 symtab->insert(entry->value, ext_strings + entry->iss);
159 if (entry[j].iss != -1)
160 symtab->insert(entry[j].value, strings + entry[j].iss);
167 symtab->insert(entry->value, local_strings + entry->iss);
H A Dcoff_sym.h82 * "iss" Index into String Space.
243 coff_int iss; /* index into String Space of name */ member in struct:ecoff_sym
257 /* The following converts a memory resident string to an iss.
273 coff_int ifd; /* where the iss and index fields point into */
309 unsigned index : 20; /* index int sym/aux/iss tables */
319 coff_uint index; /* index int sym/aux/iss tables */
357 coff_int iss; /* index into string space (not used) */ member in union:__anon21
489 stConstant scInfo iss --- (complex, e.g. string)
/gem5/src/mem/
H A Ddramsim2_wrapper.cc137 istringstream iss(line.substr(field_name.size()));
138 iss >> res;
/gem5/src/arch/arm/insts/
H A Dmisc.cc335 iss = _iss;
342 bool hypTrap = mcrMrc15TrapToHyp(miscReg, xc->tcBase(), iss);
345 return std::make_shared<HypervisorTrap>(machInst, iss,
367 bool hypTrap = mcrMrc15TrapToHyp(miscReg, xc->tcBase(), iss);
370 return std::make_shared<HypervisorTrap>(machInst, iss,
H A Dstatic_inst.cc751 const uint32_t iss = advsimd ? (1 << 5) : 0xA;
754 machInst, iss,
758 machInst, iss,
820 uint32_t iss = isWfe? 0x1E00001 : /* WFE Instruction syndrome */
825 machInst, iss,
828 return std::make_shared<HypervisorTrap>(machInst, iss,
831 return std::make_shared<SecureMonitorTrap>(machInst, iss,
853 uint32_t iss = isWfe? 0x1E00001 : /* WFE Instruction syndrome */
857 return std::make_shared<SupervisorTrap>(machInst, iss,
860 return std::make_shared<HypervisorTrap>(machInst, iss,
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H A Dmisc.hh386 uint64_t iss; member in class:McrMrcMiscInst

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